EPM9400RC208-20 vs EPM9320RC208-20 比較
詳細な並列比較: EPM9400RC208-20 メーカー: Altera および EPM9320RC208-20 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM9400RC208-20 | EPM9320RC208-20 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $60.49 | $21.90 |
| Family | MAX 9000 | MAX 9000 |
| Programmable Type | In System Programmable (ISP) | — |
| Macro Cells | 400 | — |
| Usable Gates | 8,000 | 6,000 |
| Pin-to-Pin Propagation Delay | 20 ns | — |
| Maximum Operating Frequency | 100 MHz | — |
| Supply Voltage (Internal) | 4.75 V to 5.25 V | — |
| Configuration Technology | EEPROM-based (non-volatile) | — |
| JTAG Interface | IEEE Std. 1149.1 | — |
| パッケージ | 208-pin RQFP (28x28 mm) | 208-RQFP, exposed pad (208-BFQFP) |
| Supplier Device Package | 208-RQFP | — |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作温度 | [DATA_NEEDED: operating temperature range] | 0 °C to 70 °C (commercial) |
| Number of I/O Pins | [DATA_NEEDED: user I/O count] | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | — |
| MSLレベル | [DATA_NEEDED: moisture sensitivity level] | — |
| Speed Grade | -20 (20 ns) | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 320 |
| Logic Array Blocks (LABs) | — | 20 |
| Maximum I/O Pins | — | 132 |
| Propagation Delay (tPD max) | — | 20 ns |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V |
| Programming Technology | — | EEPROM, in-system programmable (ISP) |
| Boundary-Scan Interface | — | IEEE Std. 1149.1 (JTAG) |
| Architecture | — | Multiple Array Matrix (MAX), 3rd generation |
| Process Technology | — | CMOS, 5.0 V EEPROM |
| Reprogrammability | — | Yes, unlimited ISP cycles |