27C512-10 - 512Kbit (64Kx8) 100ns CMOS EPROM | Texas Instruments
部品番号: 27C512-10 ✗ 生産終了| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $4.5 | $4.50 |
| 10 | $4.05 | $40.50 |
| 100 | $3.6 | $360.00 |
| 500 | $3.15 | $1,575.00 |
| 1,000 | $2.7 | $2,700.00 |
27C512-10 概要
An EPROM (Erasable Programmable Read-Only Memory) is a non-volatile semiconductor memory that retains programmed data without power. In the broader memory hierarchy, it sits within read-only memory (ROM) devices, under the memory IC category, alongside EEPROM and Flash. OTP EPROMs cannot be electrically erased; the 27C512-10 is programmed once via a +12.5V programming voltage and permanently retains its contents, which historically made it the standard firmware-storage device for embedded systems.
Key features of the 27C512-10 include a single +5V power supply with a standard +/-10% tolerance, fast 100 ns access time in the -10 speed grade (the Macronix and TI families also offered 45/55/70/90/120/150 ns options), completely static operation requiring no clocks or refresh, and full TTL input/output compatibility. Typical CMOS standby current is around 20 uA (per the ST 27C512 family data), keeping power consumption low in battery-backed or low-duty-cycle systems.
Architecturally, the device is organized as 65,536 words of 8 bits, addressed by 15 address lines (A0-A14) with 8 bidirectional tri-state data lines (Q0-Q7). Chip enable (/E) and output enable (/G) controls provide simple bus interfacing, and the JEDEC-approved 28-pin pinout ensures cross-vendor socket compatibility with parts such as the ST M27C512, Macronix MX27C512, and Winbond W27C512.
Typical applications include firmware and BIOS storage in embedded controllers, retrocomputing and arcade board repairs, automotive engine-control ROMs (SST 27SF512 variants are still used as 27C512 drop-ins in ECM tuning), industrial equipment upgrades, and educational breadboard computer projects. The 100 ns access time supports zero-wait-state operation on many 8-bit and 16-bit microprocessor buses.
A key design consideration: programming requires VPP of +12.5V per the datasheet, and OTP parts cannot be erased - verify firmware thoroughly on a windowed UV-erase sample or use an EEPROM/Flash drop-in (such as the Winbond W27C512) during development.
This page synthesizes distributor pricing context, drop-in alternatives, pinout data, and practical design notes for an otherwise hard-to-source obsolete part - information not consolidated in any single manufacturer datasheet.
ドロップイン代替品: 27C512-10 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: 27C512-10 （同一形状・フットプリント） — 相違点: Package, Memory Type, Erase Method, Organization, Memory Size.
クイック比較ツール — 並列比較する代替部品を選択:
27C512-15FA
✅ ドロップイン✓ 在庫あり
$1.65 / 個
データシートを見る →27C512-20
✅ ドロップイン✓ 在庫あり
$4.1 / 個
データシートを見る →27C512-25-X
✅ ドロップイン✓ 在庫あり
$2.95 / 個
データシートを見る →M27C512-10F1
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MX27C512-10
✅ ドロップイン📋 参考代替品（カタログ未掲載）
W27C512-70
✅ ドロップイン📋 参考代替品（カタログ未掲載）
SST27SF512
✅ ドロップイン📋 参考代替品（カタログ未掲載）
27C512-10 最大定格＆電気的特性
| メモリサイズ | 512 Kbit |
| メモリ構成 | 64K x 8 |
| メモリタイプ | OTP EPROM (CMOS) |
| Access Time (Speed Grade -10) | 100 ns |
| Supply Voltage (VCC) | +5 V with +/-10% tolerance |
| Programming Voltage (VPP) | +12.5 V |
| Standby Current | 20 uA typical (CMOS standby) |
| Operating Mode | Totally static operation |
| インターフェース | Parallel, TTL compatible |
| Address Lines | 15 (A0-A14) |
| Data Lines | 8 (Q0-Q7), tri-state outputs |
| Control Signals | /E (chip enable), /G (output enable) |
| Pinout Standard | JEDEC-approved 28-pin EPROM pinout |
| パッケージ | 28-pin DIP |
| 実装タイプ | Through Hole |
| Erase Method | One-Time Programmable (not erasable) |
| RoHS ステータス | unknown |
27C512-10 ピン構成
| ピン 1 | A15/VPP — Address line 15 / programming voltage (+12.5V) during programming |
| ピン 2 | A12 — Address input |
| ピン 3 | A7 — Address input |
| ピン 4 | A6 — Address input |
| ピン 5 | A5 — Address input |
| ピン 6 | A4 — Address input |
| ピン 7 | A3 — Address input |
| ピン 8 | A2 — Address input |
| ピン 9 | A1 — Address input |
| ピン 10 | A0 — Address input |
| ピン 11 | Q0 — Data output, tri-state |
| ピン 12 | Q1 — Data output, tri-state |
| ピン 13 | Q2 — Data output, tri-state |
| ピン 14 | GND — Ground |
| ピン 15 | Q3 — Data output, tri-state |
| ピン 16 | Q4 — Data output, tri-state |
| ピン 17 | Q5 — Data output, tri-state |
| ピン 18 | Q6 — Data output, tri-state |
| ピン 19 | Q7 — Data output, tri-state |
| ピン 20 | /E — Chip enable (active low) |
| ピン 21 | A10 — Address input |
| ピン 22 | /G — Output enable (active low) |
| ピン 23 | A11 — Address input |
| ピン 24 | A9 — Address input (A9/VPP function during programming per JEDEC 28-pin EPROM convention) |
| ピン 25 | A8 — Address input |
| ピン 26 | A13 — Address input |
| ピン 27 | A14 — Address input |
| ピン 28 | VCC — +5V power supply |
主な用途
27C512-10 の用途: 6 件s: Embedded Firmware Storage, Retrocomputing and Arcade Board Repair, Automotive ECM Chip Tuning, Industrial Equipment Service and Upgrades, Character Generators and Lookup Tables, Educational Breadboard Computers.
Embedded Firmware Storage
The 27C512-10 stores boot firmware and application code in embedded microprocessor systems. Its 64Kx8 organization matches the 64 KB address windows of classic 8-bit CPUs such as the Z80, 6502, and 8051 families, while the 100 ns access time supports zero-wait-state operation on 8-16 MHz buses. Because it is OTP, code is immutable in the field, which suits safety-relevant or tamper-sensitive firmware. Designers place it directly on the CPU data/address bus using the /E and /G controls for chip select and read gating, with ~20 uA standby current keeping idle power low in battery-backed controllers.
おすすめ
Retrocomputing and Arcade Board Repair
Vintage computers, game consoles, and arcade PCBs from the 1980s-90s commonly use 27C512 sockets for game ROMs and BIOS images. The JEDEC 28-pin pinout of the 27C512-10 matches these sockets exactly, and the 100 ns speed comfortably covers the access requirements of original 68000 and Z80 based hardware. Repair technicians dump the original ROM image, verify it, and burn a replacement onto a fresh OTP chip or a W27C512/SST27SF512 EEPROM drop-in when iterative testing is needed. Using genuine-speed parts avoids subtle timing failures such as corrupted graphics or boot hangs in marginal sockets.
おすすめ
Automotive ECM Chip Tuning
OBD-I era engine control modules (notably GM applications) use a 27C512-compatible socket for the calibration (fuel/spark map) chip. The SST27SF512 became the de facto tuning chip because it fits the same DIP-28 footprint yet can be re-programmed for each tuning iteration, whereas a genuine 27C512-10 is single-use. When installing a 27C512-10, the tuner must set the correct start-of-device address (e.g., 8000 hex for a 27C256 image, C000 hex for 27C128) and program the +12.5V VPP algorithm correctly. The 100 ns grade is a safe choice for stock ECM clock speeds.
おすすめ
Industrial Equipment Service and Upgrades
Legacy PLCs, CNC controllers, test instruments, and motor drives frequently carry 27C512 firmware chips. When a control board fails or a firmware patch must be applied, the OTP 27C512-10 lets service engineers burn the exact validated image with no risk of accidental erasure in the field - a property maintenance teams value over Flash. The 5V-only supply and TTL-compatible parallel interface integrate directly into 1980s-90s logic (74-series buses) without level shifting, and the totally static operation adds no timing complexity. Keeping OTP stock on hand shortens MTTR for boards that original vendors no longer support.
おすすめ
Character Generators and Lookup Tables
Beyond code storage, EPROMs excel as hardware lookup tables: video character generators, sine/cosine tables for DDS, CRC/generation-polyline tables, and keyboard-decoder matrices. The 27C512-10 provides 65,536 addressable bytes, letting designers map a 15-bit input vector to an 8-bit output in a single 100 ns access - effectively a combinational function of 15 inputs realized in one chip. Address lines A0-A14 receive the input vector while /G gates the tri-state outputs onto the data bus. Because content is fixed at programming time, the lookup behavior is deterministic and immune to bit-rot from power cycling.
おすすめ
Educational Breadboard Computers
Hobbyist and university builds such as 6502/Z80 breadboard microcomputer courses use the 27C512 to hold monitor firmware and test programs. The community consensus (e.g., Ben Eater-style projects) is that larger 27C512 chips are often cheaper and more available than smaller 27C256/27C128 parts; designers simply map or tie the highest address lines and adjust the start-of-device address in the programmer. The 100 ns -10 grade eliminates wait-state concerns on slow educational clock rates, and the through-hole DIP-28 package is breadboard-friendly. TL866-class USB programmers handle the +12.5V programming algorithm directly.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: 27C512-10 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | 27C512-15FA | M27C512-10F1 | MX27C512-10 | W27C512-70 | SST27SF512 |
|---|---|---|---|---|---|---|
| Package | 28-pin DIP | 28-pin DIP - same | 28-CDIP windowed - same JEDEC footprint | 28-pin DIP - same | 28-pin DIP - same | 28-pin DIP - same |
| Brand | Texas Instruments | Texas Instruments | STMicroelectronics | Macronix | Winbond | Microchip Technology |
| Access Time | 100 ns | 150 ns | 100 ns | 100 ns | 70 ns | 70 ns |
| Memory Technology | OTP EPROM (CMOS) | OTP EPROM | UV EPROM (windowed, erasable) | OTP EPROM | EEPROM (electrically erasable) | Flash |
| Organization | 64K x 8 (512 Kbit) | 64K x 8 | 64K x 8 | 64K x 8 | 64K x 8 | 64K x 8 |
| Supply Voltage | +5V +/-10% | +5V +/-10% | +5V | +5V (5V-only) | +5V | +5V |
| Re-programmable | No (OTP) | No (OTP) | Yes (UV erase) | No (OTP) | Yes (electrical erase) | Yes (electrical erase) |
主な差別化要因
- Fast 100 ns access time （vs 27C512-15FA)
- Data immutability (OTP) （vs W27C512-70)
- CMOS low standby power （vs M27C512-10F1)
- Re-programmability trade-off （vs SST27SF512)
設計ノート
The 27C512-10 is one-time programmable - there is no undo. Always validate the firmware image and the programming algorithm (including the +12.5V VPP level and timing) on a UV-erasable M27C512-10F1 or an electrically erasable W27C512 development chip before burning OTP units for production. Note also that pin 24 (A9) serves double duty during programming on this JEDEC pinout; a programmer configured for the wrong family can apply VPP to the wrong pin and destroy the device.
Verify bus timing margin against the actual -10 datasheet AC parameters before assuming zero-wait-state operation: 100 ns access time plus address-valid-to-setup, /E and /G propagation delays, and output-float times must fit inside your CPU read cycle. For 12-16 MHz 8-bit designs, 100 ns typically fits; for faster buses or heavily loaded address lines (large capacitance from multiple memory chips), add a wait state or move to a faster grade. Decouple VCC with 0.1 uF ceramic close to the socket, since CMOS EPROMs draw transient current on each output transition.
When laying out a universal EPROM socket (27C256/27C512/27C010), route the highest address pins and VPP-capable pins (pin 1, pin 24, pin 28 area) to jumper-selectable nets so the same PCB accepts multiple densities. Tie unused 27C512 address lines (A15 on pin 1 when emulating a 27C256 image) low or to a selector. Keep address/data traces short and roughly equal length for clean timing; the through-hole DIP-28 also allows a ZIF socket for development benches, which avoids socket-wear on production boards.
コンプライアンス情報
Part predates RoHS (2006); original production almost certainly used leaded solder. No compliance statements found in provided data.
