27C512-10 - 512Kbit (64Kx8) 100ns CMOS EPROM | Texas Instruments
MPN: 27C512-10 β End of Life| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $4.5 | $4.50 |
| 10 | $4.05 | $40.50 |
| 100 | $3.6 | $360.00 |
| 500 | $3.15 | $1,575.00 |
| 1,000 | $2.7 | $2,700.00 |
Drop-in alternatives for 27C512-10 β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
27C512-15FA
β Drop-Inβ In Stock
$1.65 / Unit
View Datasheet β27C512-20
β Drop-Inβ In Stock
$4.1 / Unit
View Datasheet β27C512-25-X
β Drop-Inβ In Stock
$2.95 / Unit
View Datasheet βM27C512-10F1
β Drop-Inπ Reference alternative (not in catalog)
MX27C512-10
β Drop-Inπ Reference alternative (not in catalog)
W27C512-70
β Drop-Inπ Reference alternative (not in catalog)
SST27SF512
β Drop-Inπ Reference alternative (not in catalog)
27C512-10 Maximum Ratings & Electrical Characteristics
| Memory Size | 512 Kbit |
| Organization | 64K x 8 |
| Memory Type | OTP EPROM (CMOS) |
| Access Time (Speed Grade -10) | 100 ns |
| Supply Voltage (VCC) | +5 V with +/-10% tolerance |
| Programming Voltage (VPP) | +12.5 V |
| Standby Current | 20 uA typical (CMOS standby) |
| Operating Mode | Totally static operation |
| Interface | Parallel, TTL compatible |
| Address Lines | 15 (A0-A14) |
| Data Lines | 8 (Q0-Q7), tri-state outputs |
| Control Signals | /E (chip enable), /G (output enable) |
| Pinout Standard | JEDEC-approved 28-pin EPROM pinout |
| Package | 28-pin DIP |
| Mounting Type | Through Hole |
| Erase Method | One-Time Programmable (not erasable) |
| RoHS Status | unknown |
27C512-10 Pin Configuration
| Pin 1 | A15/VPP β Address line 15 / programming voltage (+12.5V) during programming |
| Pin 2 | A12 β Address input |
| Pin 3 | A7 β Address input |
| Pin 4 | A6 β Address input |
| Pin 5 | A5 β Address input |
| Pin 6 | A4 β Address input |
| Pin 7 | A3 β Address input |
| Pin 8 | A2 β Address input |
| Pin 9 | A1 β Address input |
| Pin 10 | A0 β Address input |
| Pin 11 | Q0 β Data output, tri-state |
| Pin 12 | Q1 β Data output, tri-state |
| Pin 13 | Q2 β Data output, tri-state |
| Pin 14 | GND β Ground |
| Pin 15 | Q3 β Data output, tri-state |
| Pin 16 | Q4 β Data output, tri-state |
| Pin 17 | Q5 β Data output, tri-state |
| Pin 18 | Q6 β Data output, tri-state |
| Pin 19 | Q7 β Data output, tri-state |
| Pin 20 | /E β Chip enable (active low) |
| Pin 21 | A10 β Address input |
| Pin 22 | /G β Output enable (active low) |
| Pin 23 | A11 β Address input |
| Pin 24 | A9 β Address input (A9/VPP function during programming per JEDEC 28-pin EPROM convention) |
| Pin 25 | A8 β Address input |
| Pin 26 | A13 β Address input |
| Pin 27 | A14 β Address input |
| Pin 28 | VCC β +5V power supply |
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
27C512-10 is suitable for 6 applications: Embedded Firmware Storage, Retrocomputing and Arcade Board Repair, Automotive ECM Chip Tuning, Industrial Equipment Service and Upgrades, Character Generators and Lookup Tables, Educational Breadboard Computers.
Embedded Firmware Storage
The 27C512-10 stores boot firmware and application code in embedded microprocessor systems. Its 64Kx8 organization matches the 64 KB address windows of classic 8-bit CPUs such as the Z80, 6502, and 8051 families, while the 100 ns access time supports zero-wait-state operation on 8-16 MHz buses. Because it is OTP, code is immutable in the field, which suits safety-relevant or tamper-sensitive firmware. Designers place it directly on the CPU data/address bus using the /E and /G controls for chip select and read gating, with ~20 uA standby current keeping idle power low in battery-backed controllers.
Recommended
Retrocomputing and Arcade Board Repair
Vintage computers, game consoles, and arcade PCBs from the 1980s-90s commonly use 27C512 sockets for game ROMs and BIOS images. The JEDEC 28-pin pinout of the 27C512-10 matches these sockets exactly, and the 100 ns speed comfortably covers the access requirements of original 68000 and Z80 based hardware. Repair technicians dump the original ROM image, verify it, and burn a replacement onto a fresh OTP chip or a W27C512/SST27SF512 EEPROM drop-in when iterative testing is needed. Using genuine-speed parts avoids subtle timing failures such as corrupted graphics or boot hangs in marginal sockets.
Recommended
Automotive ECM Chip Tuning
OBD-I era engine control modules (notably GM applications) use a 27C512-compatible socket for the calibration (fuel/spark map) chip. The SST27SF512 became the de facto tuning chip because it fits the same DIP-28 footprint yet can be re-programmed for each tuning iteration, whereas a genuine 27C512-10 is single-use. When installing a 27C512-10, the tuner must set the correct start-of-device address (e.g., 8000 hex for a 27C256 image, C000 hex for 27C128) and program the +12.5V VPP algorithm correctly. The 100 ns grade is a safe choice for stock ECM clock speeds.
Recommended
Industrial Equipment Service and Upgrades
Legacy PLCs, CNC controllers, test instruments, and motor drives frequently carry 27C512 firmware chips. When a control board fails or a firmware patch must be applied, the OTP 27C512-10 lets service engineers burn the exact validated image with no risk of accidental erasure in the field - a property maintenance teams value over Flash. The 5V-only supply and TTL-compatible parallel interface integrate directly into 1980s-90s logic (74-series buses) without level shifting, and the totally static operation adds no timing complexity. Keeping OTP stock on hand shortens MTTR for boards that original vendors no longer support.
Recommended
Character Generators and Lookup Tables
Beyond code storage, EPROMs excel as hardware lookup tables: video character generators, sine/cosine tables for DDS, CRC/generation-polyline tables, and keyboard-decoder matrices. The 27C512-10 provides 65,536 addressable bytes, letting designers map a 15-bit input vector to an 8-bit output in a single 100 ns access - effectively a combinational function of 15 inputs realized in one chip. Address lines A0-A14 receive the input vector while /G gates the tri-state outputs onto the data bus. Because content is fixed at programming time, the lookup behavior is deterministic and immune to bit-rot from power cycling.
Recommended
Educational Breadboard Computers
Hobbyist and university builds such as 6502/Z80 breadboard microcomputer courses use the 27C512 to hold monitor firmware and test programs. The community consensus (e.g., Ben Eater-style projects) is that larger 27C512 chips are often cheaper and more available than smaller 27C256/27C128 parts; designers simply map or tie the highest address lines and adjust the start-of-device address in the programmer. The 100 ns -10 grade eliminates wait-state concerns on slow educational clock rates, and the through-hole DIP-28 package is breadboard-friendly. TL866-class USB programmers handle the +12.5V programming algorithm directly.
Recommended
Recommended Products Summary
Engineering reference data for 27C512-10 β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | 27C512-15FA | M27C512-10F1 | MX27C512-10 | W27C512-70 | SST27SF512 |
|---|---|---|---|---|---|---|
| Package | 28-pin DIP | 28-pin DIP - same | 28-CDIP windowed - same JEDEC footprint | 28-pin DIP - same | 28-pin DIP - same | 28-pin DIP - same |
| Brand | Texas Instruments | Texas Instruments | STMicroelectronics | Macronix | Winbond | Microchip Technology |
| Access Time | 100 ns | 150 ns | 100 ns | 100 ns | 70 ns | 70 ns |
| Memory Technology | OTP EPROM (CMOS) | OTP EPROM | UV EPROM (windowed, erasable) | OTP EPROM | EEPROM (electrically erasable) | Flash |
| Organization | 64K x 8 (512 Kbit) | 64K x 8 | 64K x 8 | 64K x 8 | 64K x 8 | 64K x 8 |
| Supply Voltage | +5V +/-10% | +5V +/-10% | +5V | +5V (5V-only) | +5V | +5V |
| Programming Voltage | +12.5V | +12.5V | +12.5V | +12.5V | [DATA_NEEDED] | [DATA_NEEDED] |
| Re-programmable | No (OTP) | No (OTP) | Yes (UV erase) | No (OTP) | Yes (electrical erase) | Yes (electrical erase) |
Key Differentiators
- Fast 100 ns access time (vs 27C512-15FA)
- Data immutability (OTP) (vs W27C512-70)
- CMOS low standby power (vs M27C512-10F1)
- Re-programmability trade-off (vs SST27SF512)
Design Notes
The 27C512-10 is one-time programmable - there is no undo. Always validate the firmware image and the programming algorithm (including the +12.5V VPP level and timing) on a UV-erasable M27C512-10F1 or an electrically erasable W27C512 development chip before burning OTP units for production. Note also that pin 24 (A9) serves double duty during programming on this JEDEC pinout; a programmer configured for the wrong family can apply VPP to the wrong pin and destroy the device.
Verify bus timing margin against the actual -10 datasheet AC parameters before assuming zero-wait-state operation: 100 ns access time plus address-valid-to-setup, /E and /G propagation delays, and output-float times must fit inside your CPU read cycle. For 12-16 MHz 8-bit designs, 100 ns typically fits; for faster buses or heavily loaded address lines (large capacitance from multiple memory chips), add a wait state or move to a faster grade. Decouple VCC with 0.1 uF ceramic close to the socket, since CMOS EPROMs draw transient current on each output transition.
When laying out a universal EPROM socket (27C256/27C512/27C010), route the highest address pins and VPP-capable pins (pin 1, pin 24, pin 28 area) to jumper-selectable nets so the same PCB accepts multiple densities. Tie unused 27C512 address lines (A15 on pin 1 when emulating a 27C256 image) low or to a selector. Keep address/data traces short and roughly equal length for clean timing; the through-hole DIP-28 also allows a ZIF socket for development benches, which avoids socket-wear on production boards.
Compliance Information
Part predates RoHS (2006); original production almost certainly used leaded solder. No compliance statements found in provided data.
