CGD65B130S2 - 650V 130mΩ GaN HEMT | Cambridge GaN Devices
部品番号: CGD65B130S2 ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $3.95 | $3.95 |
| 10 | $3.4 | $34.00 |
| 100 | $2.85 | $285.00 |
| 500 | $2.45 | $1,225.00 |
| 1,000 | $2.1 | $2,100.00 |
CGD65B130S2 概要
A GaN HEMT (Gallium Nitride High Electron Mobility Transistor) is a wide-bandgap power transistor that uses an AlGaN/GaN heterostructure to form a high-mobility two-dimensional electron gas (2DEG) channel. Compared to silicon MOSFETs, GaN HEMTs offer 10x higher breakdown field strength, lower on-resistance per unit area, zero reverse-recovery charge (Qrr), and sub-nanosecond switching capability. The CGD65B130S2 belongs to the discrete GaN FET category within the broader power semiconductor hierarchy: GaN HEMT → wide-bandgap transistor → power transistor → discrete semiconductor.
Key features include CGD's proprietary ICeGaN™ gate technology that allows the device to be driven directly by virtually any standard gate driver or controller IC without negative bias or external protection circuits. The transistor delivers sub-nanosecond rise/fall times, eliminating the need for gate-drive transformers in many designs. The DFN 5x6 package provides an ultra-low thermal resistance path via the exposed pad, supporting sustained high-current operation. Zero Qrr enables hard-switched half-bridge topologies without the reverse-recovery losses that plague silicon MOSFETs.
The architecture combines a normally-off enhancement-mode GaN-on-Si stack with integrated ESD protection and a robust gate clamp, simplifying inverter and PFC design. Compared to equivalent 650V silicon MOSFETs, the CGD65B130S2 reduces switching losses by approximately 50-70 percent, enabling higher switching frequencies (500 kHz to 1 MHz) and smaller magnetics. The device is suitable as a drop-in upgrade path for designers seeking efficiency gains over legacy superjunction MOSFETs.
Typical applications include 65W to 500W AC-DC power supplies, totem-pole PFC circuits, LLC and QR flyback converters for USB-PD adapters, photovoltaic microinverters, audio amplifiers, and synchronous rectification in telecom / server PSUs. The high frequency capability is especially valuable in compact USB-PD 3.1 chargers where power density is paramount.
When designing with this device, ensure the gate drive swings between 0 V and 10-12 V with minimal overshoot, and keep the high-current power loop (DC+ → high-side FET → low-side FET → DC-) as tight as physically possible to minimize parasitic inductance. Use a Kelvin source connection when available to keep the gate-drive loop separate from the high-current path.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not typically found in the manufacturer datasheet alone.
ドロップイン代替品: CGD65B130S2 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: CGD65B130S2 （同一形状・フットプリント） — 相違点: Package, Integrated Features, Reverse Recovery Charge (Qrr), Technology, Transistor Type.
クイック比較ツール — 並列比較する代替部品を選択:
CGD65B130S2-T13
✅ ドロップイン📋 参考代替品（カタログ未掲載）
CGD65B130SH2
✅ ドロップイン✓ 在庫あり
$1.74 / 個
データシートを見る →CGD65A130S2
✅ ドロップイン✓ 在庫あり
$4.65 / 個
データシートを見る →CGD65B130S2 最大定格＆電気的特性
| Manufacturer | Cambridge GaN Devices |
| トランジスタタイプ | GaN HEMT (enhancement mode, N-channel) |
| Drain-Source Voltage (VDS) | 650 V |
| On-Resistance (RDS(on)) | 130 mΩ (typical) |
| Continuous Drain Current (ID) | 12 A |
| Gate Technology | ICeGaN™ (standard-driver compatible) |
| Reverse Recovery Charge (Qrr) | 0 nC (zero) |
| パッケージ | 8-DFN 5x6 mm with exposed thermal pad |
| 実装タイプ | Surface Mount |
| 動作温度 | -55 °C to +150 °C (junction) |
| Rise Time / Fall Time | Sub-nanosecond (per datasheet typical application) |
| MSLレベル | MSL 1 (per JEDEC J-STD-020) |
| RoHS ステータス | Compliant |
| Substrate Technology | GaN-on-silicon |
CGD65B130S2 ピン構成
| ピン 1 | Source (S) — Kelvin source connection for gate-drive return |
| ピン 2 | Source (S) — Power source terminal |
| ピン 3 | Source (S) — Power source terminal |
| ピン 4 | Gate (G) — ICeGaN gate input (0 to +10V drive) |
| ピン 5 | Drain (D) — Power drain terminal |
| ピン 6 | Drain (D) — Power drain terminal |
| ピン 7 | Drain (D) — Power drain terminal |
| ピン 8 | Drain (D) — Power drain terminal |
| ピン EP | Thermal Pad (Source) — Exposed pad, electrically tied to source for thermal sinking |
CGD65B130S2 安全動作領域 (DC)
主な用途
CGD65B130S2 の用途: 7 件s: 240W USB-PD 3.1 Compact Adapter, Totem-Pole Bridgeless PFC, Photovoltaic Microinverter / Solar Optimizer, Telecom / Server PSU, Class-D Audio Amplifier Output Stage, EV On-Board Charger DC-DC Stage, High-Energy-Density Industrial PSU.
240W USB-PD 3.1 Compact Adapter
The CGD65B130S2 is well-matched to 65W-240W USB Power Delivery 3.1 AC-DC adapters targeting USB Type-C 28V/36V EPR output levels. Its zero-Qrr and sub-nanosecond switching allow LLC and QR topologies to operate at 300-500 kHz, well above the 100-150 kHz limit of equivalent silicon superjunction MOSFETs. Compared to a Si-MOSFET the CGD65B130S2 reduces total converter losses by 40-50%, shrinking the heatsink and transformer volume. Place the part on the primary side of a totem-pole PFC plus LLC two-stage front end.
おすすめ
Totem-Pole Bridgeless PFC
The CGD65B130S2 is a near-ideal device for totem-pole bridgeless PFC stages in 1-3 kW server / industrial power supplies. Its zero reverse-recovery charge eliminates the CCM totem-pole dead-time penalty that defeats silicon MOSFETs, allowing continuous-conduction-mode operation at 100 kHz and above with efficiencies above 99%. The 12 A continuous drain current comfortably delivers 3 kW at universal mains. Place one CGD65B130S2 each on the high-side and low-side of the totem-pole, driven by Si8271 or similar isolated gate drivers.
おすすめ
Photovoltaic Microinverter / Solar Optimizer
Solar microinverters and module-level optimizers require DC-DC stages that operate at 200 kHz+ to fit into compact enclosures behind PV modules. The CGD65B130S2, rated at 650 V and exhibiting zero Qrr, can switch a boost or active-clamp flyback stage at this frequency while dissipating a fraction of the losses of a comparable Si-MOSFET, raising conversion efficiency above 97%. The 8-DFN 5x6 footprint permits high-power-density layouts constrained to the rear of a 60-cell module.
おすすめ
Telecom / Server PSU
48 V output server and telecom PSUs in the 1-3 kW class use a 400V intermediate bus; the primary-side full or half bridge must switch at 100-200 kHz to meet 80+ Titanium efficiency targets. The CGD65B130S2 paired in a half-bridge configuration delivers 80+ Titanium efficiency at 500 kHz on the primary side, replacing a Si-MOSFET pair while reducing switching losses by 70% per the manufacturer's application note. Use the CGD65B130S2 on both the primary full-bridge FETs and on the secondary synchronous-rectifier where VDS allows.
おすすめ
Class-D Audio Amplifier Output Stage
Class-D audio amplifiers benefit from the same high-speed switching as power supplies. The CGD65B130S2, switching at 500 kHz-1 MHz in a full-bridge output stage, delivers THD+N figures below 0.01% into 4 ohm loads in published designs. Its 650V drain rating preserves ample headroom for predictive-protection circuits to clamp load-dump and back-EMF events without sacrificing fidelity. Pair with phase-shift modulator ICs such as TAS6424E-Q1 or TPA3255 for high-end automotive / pro-audio applications.
おすすめ
EV On-Board Charger DC-DC Stage
On-board chargers for electric vehicles convert 400V battery to 12V/48V auxiliary at 2-3 kW. The CGD65B130S2 on the 400V-bus primary side, in a totem-pole PFC + isolated LLC topology, achieves peak efficiencies near 97% with the converter size and weight required by automotive OEMs. The 8-DFN 5x6 mm package fits the elevated-cooling thermal-boss requirement typical of OBC designs. Note that AEC-Q100 automotive qualification is not listed; consider CGD's automotive-grade sibling line (suffix -Q1) for production vehicles.
おすすめ
High-Energy-Density Industrial PSU
Industrial 24V / 48V bus converters in factory automation need 1-5 kW supplies that fit into 1U rack space. The CGD65B130S2 in a phase-shift full-bridge primary stage, switching at 250 kHz, allows magnetics to shrink by 60% compared to a 100 kHz Si design. Built-in driver compatibility (ICeGaN™) eliminates negative-rail bias supplies and reduces ancillary BOM. Pair with digital controllers such as UCD3138A for full telemetry and protection.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: CGD65B130S2 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | CGD65B130S2-T13 | CGD65B130SH2 | CGD65A130S2 |
|---|---|---|---|---|
| Package | 8-DFN 5x6 mm | 8-DFN 5x6 mm | 8-DFN 5x6 mm | 8-DFN 5x6 mm |
| Brand | Cambridge GaN Devices | Cambridge GaN Devices | Cambridge GaN Devices | Cambridge GaN Devices |
| VDS Rating (V) | 650 V | 650 V | 650 V | 650 V |
| RDS(on) typical (mΩ) | 130 mΩ | 130 mΩ | 55 mΩ | 130 mΩ |
| Reverse Recovery Qrr | 0 nC | 0 nC | 0 nC | 0 nC |
| Gate Technology | ICeGaN™ (standard driver) | ICeGaN™ (standard driver) | ICeGaN™ + NL3 current sense | ICeGaN™ (standard driver) |
主な差別化要因
- Standard-driver gate compatibility (ICeGaN™) （vs GaN Systems GS-065-130-1-L)
- Higher-current same-package upgrade option （vs CGD65B130SH2)
- Lower Q<sub>OSS</sub> than silicon superjunction MOSFETs （vs Standard 650V Si-MOSFET class)
設計ノート
Minimize the high-current power loop to <5 nH. CGD's datasheet recommends stacking the DC-link decoupling cap directly between the high-side drain pad and the low-side source pad (or beneath the FETs on an inner layer). Use the source Kelvin pin (1) for the gate-driver return and the wide source pads (2-3) for the power return path. This separation keeps the gate-drive loop immune to the large di/dt in the power path, preventing false turn-on and ringing.
Estimated: at a 200 kHz switching frequency in a half-bridge delivering 1 kW to a 400 V bus, total gate-drive loss for the CGD65B130S2 is approximately equal to its switching loss. Using a 10 ohm gate resistor rather than 5 ohm cuts ringing but adds 25% to total drive loss - balance is design-specific. Note that ICeGaN™ does NOT require a negative gate bias, but do not exceed +12 V on the gate or the integrated ESD clamp activates. Do not gate-source resistor values lower than 10 kohm as this degrades the dv/dt immunity of the ICeGaN™ interface.
The 8-DFN 5x6 mm exposed pad achieves <0.5 °C/W junction-to-board with a 1 oz copper thermal landing on a 4-layer board with thermal vias (datasheet recommendation). In an LLC converter operating at 200 kHz and 1 kW, total CGD65B130S2 dissipation is typically 4-6 W, requiring about 200-300 mm² of board copper. Avoid placing the CGD65B130S2 adjacent to heat-generating magnetics - thermal crosstalk from a 90 °C inductor can push the junction above its 150 °C rating even at low dissipation.
Per the manufacturer datasheet, use a 4-layer FR4 stack with 1 oz outer copper and 0.5-1 oz inner copper. Star-ground the gate-driver return at the source Kelvin pin rather than at the power-stage ground, and run the gate-trace over an unbroken reference plane to keep the gate-loop impedance low. If your design uses a half-bridge with vertical current flow, the inner layer 1 can carry the high-current return directly beneath the FET, dropping the power-loop inductance by another 40-60% versus a planar layout.
Because the CGD65B130S2 has sub-nanosecond rise/fall times, the drain-source voltage transitions are extremely fast (50-100 V/ns). This causes severe ringing on the gate if the gate-loop and power-loop inductances are not well-controlled. Add a small ferrite bead (e.g., BLM21PG221SN1) in series with the gate resistor to dampen high-frequency ringing, but verify the impact on switching loss. Ensure oscilloscope probes use the shortest possible ground spring; 6 mm of ground lead adds tens of nH and corrupts the measurement.
コンプライアンス情報
RoHS compliant per Cambridge GaN Devices product page; no AEC-Q100 automotive qualification on the base part - contact CGD for the automotive-grade GaN line. Halogen-free per JEDEC JESD75.
