DSPIC33FJ128GP804-I/ML - 16-bit DSC 128KB 40MIPS | Microchip
部品番号: DSPIC33FJ128GP804-I/ML ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $11.12 | $11.12 |
| 10 | $10.57 | $105.70 |
| 25 | $10.01 | $250.25 |
| 100 | $9.45 | $945.00 |
| 1,000 | $8.9 | $8,900.00 |
DSPIC33FJ128GP804-I/ML 概要
A digital signal controller blends the peripheral set and deterministic interrupt behavior of a microcontroller with the multiply-accumulate horsepower of a DSP core. Within Microchip's portfolio, the dsPIC33F family sits above PIC18 8-bit MCUs and below 32-bit PIC32/dsPIC33C parts, targeting mixed signal-and-control workloads such as motor control, digital power, and audio processing where a single chip must close control loops and process sampled data streams.
Key features of this device include a 16-bit modified Harvard architecture core executing up to 40 MIPS at 3.3 V, 128 KB of self-programmable flash program memory, 16 KB of SRAM, and a DMA controller that offloads the CPU during intensive data transfers. Peripheral Pin Select (PPS) allows most digital peripherals to be remapped to nearly any pin, easing PCB layout. The Data Conversion Interface (DCI) supports I2S/AC97 audio codecs, and the General Purpose (GP) variant carries advanced analog peripherals and multiple UART, SPI, and I2C modules.
Architecturally, the dsPIC33FJ128GP804 provides DSP engine instructions (MAC, DSP multiply), hardware looping, and a flexible interrupt vector table with per-interrupt priority. Flash endurance supports in-field firmware updates through self-programming. Automotive AEC-Q100 qualification of the -I temperature grade (per distributor listings) supports e-mobility applications, from e-bikes and scooters to electric vehicles, alongside industrial drives and digital audio platforms.
Typical applications include sensorless BLDC and PMSM motor control, digital power supplies and inverters, audio effect and codec processing via the DCI, and industrial automation nodes requiring deterministic control with math acceleration.
Design considerations: the 44-pin QFN exposed pad should be soldered to a ground plane for thermal and signal-integrity performance, and Peripheral Pin Select must be configured in code before any remapped peripheral becomes functional.
This page synthesizes distributor pricing, pin-compatible drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
ドロップイン代替品: DSPIC33FJ128GP804-I/ML — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: DSPIC33FJ128GP804-I/ML （同一形状・フットプリント） — 相違点: Package, Core Architecture, Operating Temperature, Timers, DMA Channels.
クイック比較ツール — 並列比較する代替部品を選択:
DSPIC33FJ64GP804-I/ML
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
DSPIC33FJ32GP304-I/ML
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
$3.49 / 個
データシートを見る →DSPIC33FJ128GP804-E/ML
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
価格はお問い合わせください
データシートを見る →DSPIC33FJ128MC804-I/ML
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
$5.95 / 個
データシートを見る →DSPIC33FJ128GP804-I/ML 最大定格＆電気的特性
| Core Architecture | 16-bit dsPIC33F modified Harvard |
| Program Flash Memory | 128 KB |
| SRAM | 16 KB |
| Max CPU Speed | 40 MIPS (40 MHz) |
| Operating Voltage | 3.3 V |
| パッケージ | 44-pin QFN with exposed pad (ML) |
| 動作温度 | -40C to +85C (I grade) |
| Digital I/O Pins | 35 |
| DMA Controller | Yes |
| Peripheral Pin Select (PPS) | Yes |
| Audio Interface | DCI (I2S/AC97) |
| Qualification | AEC-Q100 (automotive, per distributor listing) |
| 実装タイプ | Surface Mount |
| Series | dsPIC33FJ128GPX02/X04 |
DSPIC33FJ128GP804-I/ML 44-pin qfn with exposed pad (ml) ピン配置ガイド
DSPIC33FJ128GP804-I/ML (44-pin qfn with exposed pad (ml) パッケージ) のピン配置。 このデジタルICには、GPIO、通信インターフェース (UART、SPI、I2C)、および電源ピンが含まれています。代替ピン機能と設定オプションについては、メーカーのデータシートを参照してください。組み込みシステム設計とPCBレイアウトに不可欠です。
詳細なピン配置データはありません: DSPIC33FJ128GP804-I/ML.
詳細は データシート をご参照ください。
主な用途
DSPIC33FJ128GP804-I/ML の用途: 6 件s: Sensorless BLDC / PMSM Motor Control, Digital Power Supplies and Inverters, Audio Processing and Codec Systems, E-Mobility and Electric Vehicles, Industrial Automation and Sensing Nodes, Medical and Portable Instrumentation.
Sensorless BLDC / PMSM Motor Control
The DSPIC33FJ128GP804-I/ML fits motor control because its 40 MIPS DSP engine executes field-oriented control loops with MAC instructions at deterministic interrupt latency, while 128 KB flash holds FOC code, compensation tables, and communications stacks simultaneously. Motor-control firmware typically uses the ADC with simultaneous sampling of phase currents, PWM output compare channels, and Peripheral Pin Select to route capture inputs for speed feedback. Running the current loop at 10-20 kHz leaves ample CPU margin for field weakening and protection routines. The DMA controller offloads ADC results so the CPU is not stalled during multi-channel sampling, a quantified benefit for control-loop jitter.
おすすめ
Digital Power Supplies and Inverters
Digital SMPS and solar/battery inverters demand fast, deterministic control loops - precisely what the DSPIC33FJ128GP804-I/ML delivers with its 40 MIPS core, high-speed ADC, and hardware PWM with fine edge control. The DSP engine computes PID or predictive control terms each switching cycle (typically 50-500 kHz for power stages), and the 128 KB flash supports multiple operating profiles, soft-start routines, and firmware-updatable compensation. Digital implementations avoid analog drift over temperature, and the I-grade -40C to +85C rating with AEC-Q100 qualification (per distributor data) suits telecom rectifiers and on-board charger sub-systems where reliability documentation is required.
おすすめ
Audio Processing and Codec Systems
The Data Conversion Interface (DCI) on the DSPIC33FJ128GP804-I/ML supports I2S and AC97 framing, connecting directly to external audio codecs, while the DSP engine performs biquad filters, dynamics processing, and mixing at 40 MIPS. The DMA controller streams sample buffers between the DCI and 16 KB SRAM without CPU intervention, cutting interrupt overhead during continuous audio throughput. Typical products include mixers, guitar effects, conferencing endpoints, and intercom systems. The constraint to respect is SRAM: 16 KB bounds delay lines and buffer depth, so designs needing long reverb tails or multi-channel buffering should verify their memory budget before layout.
おすすめ
E-Mobility and Electric Vehicles
Microchip positions the dsPIC33 DSC family explicitly for e-mobility - e-bikes, scooters, and electric cars and trucks - and the DSPIC33FJ128GP804-I/ML contributes AEC-Q100 qualification (per Arrow listing) plus an industrial -40C to +85C range. In e-bike and light-EV controllers it closes motor current loops, monitors battery voltage and temperature through its ADC, and speaks CAN or UART to the vehicle network, all from one 44-pin QFN. The 128 KB flash accommodates safety routines, multi-mode riding profiles, and field updates. Peripheral Pin Select lets one board design serve several SKU variants by remapping peripherals in firmware rather than respinning hardware.
おすすめ
Industrial Automation and Sensing Nodes
Factory equipment requires deterministic control plus robust communications - the DSPIC33FJ128GP804-I/ML provides multiple UART, SPI, and I2C modules alongside the DSP core, so a single chip handles sensor conditioning, actuator control, and Modbus or proprietary serial links. The 35 I/O pins and Peripheral Pin Select allow a PCB to be routed for manufacturing convenience and then functionalized in firmware, shortening layout iterations. Advanced analog integration reduces external component count in transducer front ends. Running control and communications at 40 MIPS with hardware interrupt priorities keeps real-time response within microseconds even while service protocols execute in background loops.
おすすめ
Medical and Portable Instrumentation
Portable medical devices benefit from the DSPIC33FJ128GP804-I/ML's combination of signal processing and low system cost: the DSP engine applies digital filtering to biopotential or pressure-sensor signals, while the 3.3 V, 44-pin QFN implementation keeps board area small for handheld enclosures. The I-grade temperature rating and stable flash retention support device calibration storage in code space. Typical uses include blood-pressure monitors, infusion pump control boards, and diagnostic sensor hubs where 40 MIPS executes FFT or wavelet analysis on sampled data. Verify the applicable regulatory qualification path for the end product, as AEC-Q100 automotive grading does not itself constitute medical device certification.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: DSPIC33FJ128GP804-I/ML — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | DSPIC33FJ64GP804-I/ML | DSPIC33FJ32GP304-I/ML | DSPIC33FJ128GP804-E/ML | DSPIC33FJ128MC804-I/ML |
|---|---|---|---|---|---|
| Package | 44-pin QFN-EP (ML) | 44-pin QFN-EP (ML) - same | 44-pin QFN-EP (ML) - same | 44-pin QFN-EP (ML) - same | 44-pin QFN-EP (ML) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Program Flash | 128 KB | 64 KB | 32 KB | 128 KB | 128 KB |
| CPU Speed | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS |
| Operating Temperature | -40C to +85C (I grade) | -40C to +85C (I grade) | -40C to +85C (I grade) | -40C to +125C (E grade) | -40C to +85C (I grade) |
| Peripheral Family Focus | GP (general purpose / audio DCI) | GP (identical peripheral set) | GP (identical peripheral set) | GP (identical peripheral set) | MC (motor-control ADC/peripheral mix) |
主な差別化要因
- Maximum flash in the 44-pin GP family （vs DSPIC33FJ64GP804-I/ML)
- Extended temperature option on identical die （vs DSPIC33FJ128GP804-E/ML)
- Audio/general-purpose peripheral mix with DCI （vs DSPIC33FJ128MC804-I/ML)
設計ノート
The 44-pin QFN exposed pad (ML package) must be soldered to a solid ground pour. Use a via array (3x3 or larger, 0.3 mm vias) under the pad to tie the internal ground plane and dissipate die heat - estimated: with total dissipation around 200-300 mW at 40 MIPS, a well-soldered exposed pad keeps junction temperature rise under roughly 15-25 C above ambient at typical board conditions. Follow Microchip QFN soldering application notes for stencil aperture design; insufficient paste on the center pad causes floating die and intermittent ground.
Peripheral Pin Select (PPS) is not enabled by default: remapped peripherals (UART, SPI, OC, IC) do nothing until RPINR/RPOR registers are configured with the unlock sequence. Also reserve PGC/PGD programming pins and any analog-designated pins - they cannot be remapped. Teams migrating from non-PPS PIC devices frequently lose days debugging 'dead' UARTs that are simply un-routed in PPS. Configure PPS immediately after oscillator setup and before enabling any peripheral, per Microchip's dsPIC33FJ family datasheet (document 70292G).
The device operates at a single 3.3 V rail. Decouple each VDD pin with 100 nF ceramic capacitors placed within 2 mm of the pin, plus one bulk 10 uF per device. If your PCB derives 3.3 V from a 5 V rail, budget the regulator dropout and dsPIC33 core current spikes during flash programming (estimated: allow 50-100% margin over the average run current for erase/write transients). For battery-powered e-mobility products, exploit doze and idle low-power modes; evaluate the datasheet current tables per mode rather than assuming a single sleep figure.
コンプライアンス情報
AEC-Q100 automotive qualification per Arrow product listing ('Tube Automotive AEC-Q100'). RoHS/REACH/lead-free status not stated in the provided web data - verify on the Microchip product page before export documentation.
