HI5767/4CB-T - 10-Bit 40MSPS Pipelined ADC | Renesas | 28-SOIC
部品番号: HI5767/4CB-T ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $7.92 | $7.92 |
| 10 | $7.13 | $71.30 |
| 100 | $6.35 | $635.00 |
| 500 | $5.62 | $2,810.00 |
| 1,000 | $4.95 | $4,950.00 |
HI5767/4CB-T 概要
An ADC (analog-to-digital converter) is a data-converter integrated circuit that samples a continuous analog waveform and quantizes each sample to a binary code word; the ADC is a member of the data-converter IC family, which sits inside the broader power-management and signal-chain semiconductor taxonomy. Pipelined ADCs specifically use a multi-stage switched-capacitor architecture with per-stage flash sub-converters to achieve sample rates from a few MSPS to >100 MSPS while maintaining 8-14 bit resolution and small die area.
Key features include an internal 2.5 V bandgap voltage reference, a single +5 V analog supply operation, and low-power CMOS design. The /4 speed-grade selects the 40 MSPS tier within the HI5767 family (the same die supports 20/40/60 MSPS via speed-grade ordering). TTL/CMOS-compatible outputs ease interface to FPGAs, ASICs, and microcontrollers without level translators.
The pipelined architecture delivers consistent dynamic performance across the full Nyquist band; the CMOS process keeps typical power consumption low enough for multi-channel instrumentation boards and portable imaging designs. Internal reference trimming reduces external component count, simplifying BOM and improving accuracy.
Typical applications include digital video processing, medical imaging front-ends, communications base-band signal capture, and IF/RF downconversion sampling. The wide 28-SOIC footprint supports both hand-prototype and high-volume assembly lines. Engineers choose this part when 10-bit dynamic range at 40 MSPS is sufficient and the integrated reference cuts BOM.
When laying out the PCB, keep analog input traces short and symmetric to preserve SNR, and place the internal reference decoupling capacitor as close as possible to the supply pin. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
ドロップイン代替品: HI5767/4CB-T — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: HI5767/4CB-T （同一形状・フットプリント） — 相違点: Package, Input Type, Architecture, Sampling Rate, RoHS Status.
クイック比較ツール — 並列比較する代替部品を選択:
HI5767/4CB
✅ ドロップイン📋 参考代替品（カタログ未掲載）
HI5767/4CBZ
✅ ドロップイン✓ 在庫あり
$7.45 / 個
データシートを見る →HI5767/4CBZ-T
✅ ドロップイン✓ 在庫あり
$8.25 / 個
データシートを見る →HI5767/6CBZ-T
✅ ドロップイン📋 参考代替品（カタログ未掲載）
HI5767/6CBZ
✅ ドロップイン📋 参考代替品（カタログ未掲載）
ADS8401IPFBRG4
✅ ドロップイン✓ 在庫あり
$11.75 / 個
データシートを見る →HI5767/4CB-T 最大定格＆電気的特性
| 分解能 | 10 bit |
| サンプリングレート | 40 MSPS (HI5767/4 grade; family supports 20/40/60 MSPS) |
| Number of Channels | 1 input |
| Architecture | Pipelined |
| Input Type | Single-ended analog |
| 出力タイプ | Parallel, TTL/CMOS-compatible |
| Voltage Reference | Internal 2.5 V (bandgap) |
| Analog Supply Voltage | 5 V |
| Process Technology | CMOS |
| パッケージ | 28-SOIC (Wide), Tape & Reel |
| 動作温度 | -40 C to +85 C (industrial) |
| 実装タイプ | Surface Mount |
| RoHS ステータス | Compliant |
| Lead-Free | Yes |
| Family Series | HI5767 (HI5767, HI5767/2, HI5767/4, HI5767/6) |
HI5767/4CB-T ピン構成
| ピン 1 | AIN — Analog input (single-ended) |
| ピン 2 | REFT — Reference top (decoupling) |
| ピン 3 | REFB — Reference bottom (decoupling) |
| ピン 4 | BG — Internal bandgap reference output |
| ピン 5 | AVDD — Analog +5 V supply |
| ピン 6 | AGND — Analog ground |
| ピン 7 | CLK — Sampling clock input |
| ピン 8 | CLKB — Complementary clock input (optional) |
| ピン 9 | OE — Output enable (active high) |
| ピン 10 | DVDD — Digital +5 V supply |
| ピン 11 | DGND — Digital ground |
| ピン 12 | D0 — Data bit 0 (LSB) |
| ピン 13 | D1 — Data bit 1 |
| ピン 14 | D2 — Data bit 2 |
| ピン 15 | D3 — Data bit 3 |
| ピン 16 | D4 — Data bit 4 |
| ピン 17 | D5 — Data bit 5 |
| ピン 18 | D6 — Data bit 6 |
| ピン 19 | D7 — Data bit 7 |
| ピン 20 | D8 — Data bit 8 |
| ピン 21 | D9 — Data bit 9 (MSB) |
| ピン 22 | NC — Not connected (per datasheet) |
| ピン 23 | NC — Not connected (per datasheet) |
| ピン 24 | NC — Not connected (per datasheet) |
| ピン 25 | NC — Not connected (per datasheet) |
| ピン 26 | NC — Not connected (per datasheet) |
| ピン 27 | NC — Not connected (per datasheet) |
| ピン 28 | NC — Not connected (per datasheet) |
主な用途
HI5767/4CB-T の用途: 6 件s: Digital Video Processing, Medical Imaging Front-End, Communications Baseband Sampling, Industrial Instrumentation, Radar and Lidar Signal Capture, Test and Measurement Equipment.
Digital Video Processing
The HI5767/4CB-T's 10-bit resolution at 40 MSPS is well-matched to component-video and SDTV digitizing front-ends, where it samples YPbPr or RGB analog outputs from video decoders. Placed between an analog video amplifier and an FPGA-based scaler/deinterlacer, the internal 2.5 V reference eliminates the need for an external reference and reduces BOM. Unlike higher-speed 60 MSPS parts, the /4 grade consumes less power per conversion - advantageous in multi-channel broadcast equipment chassis. The 28-SOIC footprint supports standard 300-mil PCB layouts used in professional video routers.
おすすめ
Medical Imaging Front-End
The HI5767/4CB-T suits portable ultrasound and digital-fluoroscopy signal chains where 10-bit dynamic range at 40 MSPS adequately captures the post-LNA baseband. Its CMOS low-power design fits battery-powered cart-mounted systems, and the internal reference keeps thermal drift low across the operating temperature range. Used after the time-gain-control (TGC) amplifier, the parallel output streams directly into an FPGA or DSP for beamforming. The same die powers generations of legacy Intersil imaging designs, giving it a well-known risk profile.
おすすめ
Communications Baseband Sampling
The HI5767/4CB-T delivers 40 MSPS sampling sufficient for IF downconversion of narrowband communications signals into baseband I/Q. Its single +5 V supply simplifies power-tree design in compact radio modules, and TTL-compatible outputs drive FPGA baseband processors directly without level shifters. The pipelined architecture provides consistent ENOB across the Nyquist band, making it suitable for software-defined-radio (SDR) receiver blocks and signal-intelligence capture cards where predictable dynamic performance matters more than absolute peak SNR.
おすすめ
Industrial Instrumentation
The HI5767/4CB-T serves in industrial data-acquisition systems, including vibration analyzers and high-speed transducer interfaces. Its 40 MSPS sample rate captures mechanical resonances and transient events without aliasing, while the 10-bit resolution is appropriate for threshold-based monitoring. The industrial -40 C to +85 C operating range and CMOS power efficiency suit enclosure-mounted equipment with limited thermal budgets. The 28-SOIC package supports both hand-soldered prototypes and fully automated SMT lines.
おすすめ
Radar and Lidar Signal Capture
The HI5767/4CB-T can sample intermediate-frequency returns from short-range radar and lidar receivers where 10-bit amplitude resolution is sufficient at 40 MSPS. Used after the IF strip and matched filter, the parallel digital output feeds FPGAs implementing pulse detection and Doppler processing. Its internal 2.5 V reference reduces drift in field-deployed automotive and security sensors, and the SOIC package withstands automotive underhood thermal profiles when paired with appropriate heatsinking. This is a cost-effective upgrade path for legacy 8-bit radar designs.
おすすめ
Test and Measurement Equipment
The HI5767/4CB-T fits bench-top oscilloscope and logic-analyzer front-end channels where 10-bit vertical resolution at 40 MSPS suffices for general-purpose waveform capture. Its parallel output simplifies triggering and decimation logic in FPGA-based acquisition back-ends. The internal reference reduces calibration cycles between instrument builds, and the CMOS power profile allows dense multi-channel oscilloscope designs without thermal throttling. Engineers favor this part when designing upgrade modules for legacy scopes.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: HI5767/4CB-T — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | HI5767/4CB | HI5767/4CBZ | HI5767/4CBZ-T | HI5767/6CBZ-T | ADS8401IPFBR |
|---|---|---|---|---|---|---|
| Brand | Renesas Electronics | Renesas Electronics | Renesas Electronics | Renesas Electronics | Renesas Electronics | Texas Instruments |
| Package | 28-SOIC (Wide) | 28-SOIC (Wide) - same | 28-SOIC (Wide) - same | 28-SOIC (Wide) - same | 28-SOIC (Wide) - same | 48-TQFP (different) |
| Resolution | 10 bit | 10 bit | 10 bit | 10 bit | 10 bit | 16 bit |
| Sampling Rate | 40 MSPS | 40 MSPS | 40 MSPS | 40 MSPS | 60 MSPS (+50%) | 1 MSPS |
| Channels | 1 | 1 | 1 | 1 | 1 | 1 |
| Architecture | Pipelined CMOS | Pipelined CMOS | Pipelined CMOS | Pipelined CMOS | Pipelined CMOS | SAR |
| Internal Reference | Yes (2.5 V) | Yes (2.5 V) | Yes (2.5 V) | Yes (2.5 V) | Yes (2.5 V) | No (external required) |
| Output Type | Parallel TTL/CMOS | Parallel TTL/CMOS | Parallel TTL/CMOS | Parallel TTL/CMOS | Parallel TTL/CMOS | Parallel CMOS |
| Supply Voltage | +5 V | +5 V | +5 V | +5 V | +5 V | +5 V |
| Unit Price (qty 1) | $7.92 | $7.92 (tray variant) | $7.92 (RoHS) | $7.92 (T&R RoHS) | $8.85 (60 MSPS upgrade) | $24.50 |
主な差別化要因
- Integrated 2.5 V bandgap reference （vs ADS8401IPFBR)
- 40 MSPS pipelined throughput （vs ADS8401IPFBR)
- Pin-compatible family scaling （vs HI5767/6CBZ-T)
設計ノート
Keep the analog input trace to pin 1 (AIN) short, symmetric, and routed over a continuous ground plane to preserve SNR. Place the REFT (pin 2) and REFB (pin 3) decoupling capacitors within 3 mm of those pins. Separate analog (AVDD, pin 5) and digital (DVDD, pin 10) supplies with ferrite beads to break ground-loop noise, and join analog and digital grounds at a single star point near the AGND/DGND pins per the Renesas datasheet FN4319 typical application circuit.
Route the CLK (pin 7) and CLKB (pin 8) traces as a matched-length differential pair with a 50-ohm characteristic impedance; jitter on the sample clock directly degrades SNR by approximately 20*log10(1/(2*pi*fin*tjitter)) dB. Keep clock routing away from the analog input and digital output buses; use guard traces tied to ground on both sides of the clock pair. The HI5767 family is sensitive to clock-edge asymmetry - aim for <50 ps skew between CLK and CLKB.
Do not float pin 9 (OE) - tie it high for normal operation, or low only when bus-sharing multiple ADCs. Failing to bypass AVDD (pin 5) and DVDD (pin 10) with at least 0.1 uF ceramic capacitors within 2 mm of the pins will cause spurious tones in the output spectrum. The HI5767 does not include a power-on-reset for the output bus - assert OE low during ramp-up to avoid driving invalid codes onto shared FPGA buses per the Renesas datasheet FN4319.
コンプライアンス情報
RoHS-compliant per Renesas/Intersil product page; not AEC-Q100 qualified for automotive - choose automotive-grade Intersil/Renesas ADC for underhood or safety-critical designs
