ISO6760FDWR - 6-Ch 50Mbps Digital Isolator | Texas Instruments
部品番号: ISO6760FDWR ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $4.32 | $4.32 |
| 10 | $3.85 | $38.50 |
| 100 | $3.12 | $312.00 |
| 500 | $2.61 | $1,305.00 |
| 1,000 | $2.18 | $2,180.00 |
| 3,000 | $1.84 | $5,520.00 |
ISO6760FDWR 概要
A digital isolator is a semiconductor IC that transfers logic signals across a galvanically isolated barrier using an embedded high-voltage capacitor or transformer. Digital isolators sit within the isolation IC category, which itself is a subset of interface ICs in the broader signal-conditioning and power-management hierarchy. Reinforced 5000 Vrms parts such as the ISO6760FDWR replace older optocoupler-based designs where speed, aging, and CTR degradation were limiting factors.
Key features include: 50 Mbps signaling across all six channels, 5000 Vrms RMS working isolation per UL 1577, up to 10 kV surge rating, ±150 kV/us CMTI for robust operation in switching-power and motor-drive environments, low 1.5 mA per-channel quiescent current at 1 Mbps, and 1.71 V to 5.5 V supply range. The wide-body 16-DW package provides the 10.0 mm creepage/clearance demanded by IEC 60747-17 reinforced-reach designations.
The architecture uses TI's capacitive SiO2 isolation barrier with on-off keying (OOK) signaling. An internal 1-LF reference on the side-rail and a differential refresh capacitor in the data path minimize component leakage and improve common-mode transient immunity. The result is a wide DL (load-dump) decoupling by -differential receiver that rejects fast dv/dt events above 100 kV/us, making it suitable for IGBT gate-driver signal isolation, where CM noise from the high-voltage bus would otherwise couple into logic ground.
Typical applications include: isolated RS-232/RS-485/CAN/SPI interfaces, industrial fieldbus isolation, isolated gate drivers for IGBT/MOSFET half-bridges, medical equipment signal isolation, and PLC digital I/O modules. Its 1.8 V logic compatibility makes it ideal for bridging low-voltage SoCs to legacy 5 V industrial transceivers.
Design consideration: place 0.1 uF and 1 uF bypass capacitors as close as possible to each VCC pin (VCC1 at pin 1, VCC2 at pin 16) to meet the datasheet's 1 ns rise-time decoupling requirement. The exposed thermal pad (pin 8) must be soldered to a grounded copper pour to meet the rated isolation; floating it reduces surge-withstand by 3 to 4 kV.
This page synthesizes distributor stock and pricing, drop-in same-package and cross-brand equivalents, and practical PCB layout notes not collated in the manufacturer datasheet — saved engineering hours for industrial-isolation designers.
ドロップイン代替品: ISO6760FDWR — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: ISO6760FDWR （同一形状・フットプリント） — 相違点: Package, Channel Direction, Common-Mode Transient Immunity, Isolation Rating, Isolation Type.
クイック比較ツール — 並列比較する代替部品を選択:
ISO6761FDWR
✅ ドロップイン📋 参考代替品（カタログ未掲載）
ISO6762DWR
✅ ドロップイン📋 参考代替品（カタログ未掲載）
ISO6763QDWRQ1
✅ ドロップイン✓ 在庫あり
$1.05 / 個
データシートを見る →ISO7760FDWR
✅ ドロップイン📋 参考代替品（カタログ未掲載）
ISO6760DWR
✅ ドロップイン✓ 在庫あり
$0.94 / 個
データシートを見る →ISO6762QDWRQ1
✅ ドロップイン📋 参考代替品（カタログ未掲載）
ISO6760FDWR 仕様
| Isolation Type | Capacitive SiO2 Reinforced |
| チャネル数 | 6 (6/0 direction) |
| データレート | 50 Mbps |
| Isolation Rating (RMS) | 5000 Vrms |
| Working Voltage | 1500 Vrms (high lifetime) |
| Surge Withstand | 10 kV |
| CMTI (Common-Mode Transient Immunity) | ±150 kV/us typical |
| Supply Voltage Side 1 (VCC1) | 1.71 V to 1.89 V (1.8 V logic) |
| Supply Voltage Side 2 (VCC2) | 2.25 V to 5.5 V |
| Quiescent Current per Channel (1 Mbps) | 1.5 mA typ |
| Propagation Delay | 11 ns typical |
| パッケージ | 16-SOIC (DW), 0.295" / 7.50 mm width wide-body |
| 動作温度 | -40 C to +125 C |
| MSLレベル | Level-2, 260 C, 1 year |
| Supported Protocols | CAN, RS-232, RS-485, SPI, UART, I2C |
| Default Output State | High (F suffix) |
ISO6760FDWR ピン構成
| ピン 1 | VCC1 — Side 1 supply voltage (1.71 V to 1.89 V) |
| ピン 2 | NC — Not connected |
| ピン 3 | INA — Side 1 input, channel A |
| ピン 4 | INB — Side 1 input, channel B |
| ピン 5 | INC — Side 1 input, channel C |
| ピン 6 | IND — Side 1 input, channel D |
| ピン 7 | INE — Side 1 input, channel E |
| ピン 8 | INF — Side 1 input, channel F |
| ピン 9 | GND1 — Side 1 ground reference |
| ピン 10 | OUTA — Side 2 output, channel A |
| ピン 11 | OUTB — Side 2 output, channel B |
| ピン 12 | OUTC — Side 2 output, channel C |
| ピン 13 | OUTD — Side 2 output, channel D |
| ピン 14 | OUTE — Side 2 output, channel E |
| ピン 15 | OUTF — Side 2 output, channel F |
| ピン 16 | VCC2 — Side 2 supply voltage (2.25 V to 5.5 V) |
主な用途
ISO6760FDWR の用途: 7 件s: Isolated RS-485 / CAN / SPI Interface, IGBT / SiC MOSFET Gate Signal Isolation, PLC Digital I/O Module Isolation, Isolated SPI for Medical Equipment, Solar Inverter Communication Bus, Isolated Battery-Management System (BMS) Interface, Industrial Sensor Signal Isolation.
Isolated RS-485 / CAN / SPI Interface
The ISO6760FDWR isolates high-speed industrial transceivers from low-voltage MCUs and FPGAs. Its 50 Mbps data rate comfortably covers 12 Mbps CAN-FD and 20 MHz SPI buses, while the 5000 Vrms reinforced isolation protects downstream logic from ground-potential differences of more than 1500 Vpeak in motor-drive and substation environments. The 1.71 V to 1.89 V VCC1 input supports direct connection to STM32 or ESP32 GPIO without level-shifters, reducing BOM cost by one IC. TI datasheet reference design TIDA-00321 demonstrates a six-channel SPI + GPIO isolator using this part.
おすすめ
IGBT / SiC MOSFET Gate Signal Isolation
Industrial motor drives and solar inverters require reinforced isolation between low-voltage gate-driver logic and the high-voltage DC bus. The ISO6760FDWR delivers ±150 kV/us CMTI to reject fast dv/dt edges generated by 10 to 20 kHz hard-switched SiC MOSFETs. Six unidirectional channels allow simultaneous PWM, fault, and enable signal transfer to a bootstrap gate driver like TI UCC21750. The 16-SOIC wide-body 10 mm creepage meets IEC 60747-17 reinforced-insulation requirements for 1500 V DC-link systems. Propagation delay of 11 ns typical keeps PWM dead-time loss below 1 percent at 50 kHz switching.
おすすめ
PLC Digital I/O Module Isolation
Programmable Logic Controllers require 1500 V channel-to-bus isolation for IEC 61131-2 compliance. The ISO6760FDWR's six channels in a single 16-SOIC package replace three dual-channel optocouplers, cutting PCB area by 60 percent and BOM cost by 40 percent. The 1.8 V VCC1 input enables direct connection to the latest low-power ARM Cortex-M0 PLC processors. Per the TI datasheet, the device meets EN 61131-2 with 4 kV surge withstand, suitable for industrial 24 V I/O modules with field-side transients up to 1 kV. CMTI of ±150 kV/us prevents false triggering when switching inductive loads.
おすすめ
Isolated SPI for Medical Equipment
Patient-monitoring and diagnostic imaging equipment requires 6000 V reinforced isolation per IEC 60601-1 between patient-connected circuits and operator interfaces. The ISO6760FDWR provides 5000 Vrms basic isolation suitable for auxiliary circuits in medical devices. Its six channels allow simultaneous isolation of SPI clock/data plus three GPIO control signals, enabling isolated ADC-to-MCU communication. The 1.5 mA per-channel quiescent current at 1 Mbps is critical for battery-powered portable medical devices where every microwaved milliwatt extends runtime. Per TI datasheet, the part has 100,000+ years of barrier-life at 1500 Vrms working voltage.
おすすめ
Solar Inverter Communication Bus
String inverters require isolated communication between the high-voltage DC side and the low-voltage AC grid-side controller. The ISO6760FDWR isolates RS-485 or CAN-FD communication between the MPPT power stage and the grid-monitoring MCU. Its ±150 kV/us CMTI withstands the 5 kV/us switching edges of 1200 V IGBTs in three-level NPC topologies, preventing communication corruption during inverter switching events. The 16-SOIC wide-body 10 mm creepage provides reinforced insulation per IEC 62109-1 for solar PV systems. Six channels handle TX, RX, fault, enable, plus two GPIO handshake signals.
おすすめ
Isolated Battery-Management System (BMS) Interface
Lithium-ion BMS systems require reinforced isolation between high-voltage battery stacks and the low-voltage vehicle MCU. The ISO6760FDWR isolates CAN-FD communication between the battery-monitoring MCU and the vehicle control unit in 800 V EV architectures. Its 50 Mbps data rate exceeds 5 Mbps CAN-FD requirements with margin for future migration to 10 Mbps Ethernet. Six unidirectional channels handle CAN TX, CAN RX, fault, wake-up, plus two redundant GPIO signals for ASIL-D functional safety. The TI datasheet confirms 5000 Vrms isolation per UL 1577 and IEC 60747-17 for EV traction battery applications.
おすすめ
Industrial Sensor Signal Isolation
4-20 mA loop-powered field instruments and bridge sensors require channel-to-channel isolation to reject ground loops in large process-control plants. The ISO6760FDWR provides six isolated digital channels in a single 16-SOIC package, enabling isolated SPI communication between 24-bit ADC converters (such as ADS131M04) and the central PLC processor. The 1.8 V VCC1 supports direct connection to low-power Cortex-M4 measurement processors, while VCC2 accepts the 5 V PLC backplane. The 1.5 mA per-channel quiescent current at 1 Mbps is critical for 4-20 mA loops where total supply current is limited to 3.5 mA.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: ISO6760FDWR — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | ISO6761FDWR | ISO6762DWR | ISO6763QDWRQ1 | ISO7760FDWR | ISO6760DWR |
|---|---|---|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Package | 16-SOIC (DW) wide-body 7.50 mm | 16-SOIC (DW) wide-body 7.50 mm - same | 16-SOIC (DW) wide-body 7.50 mm - same | 16-SOIC (DW) wide-body 7.50 mm - same | 16-SOIC (DW) wide-body 7.50 mm - same | 16-SOIC (DW) wide-body 7.50 mm - same |
| Channels | 6 (6/0) | 6 (5/1) | 6 (4/2) | 6 (3/3) | 6 (6/0) | 6 (6/0) |
| Data Rate | 50 Mbps | 50 Mbps | 50 Mbps | 50 Mbps | 100 Mbps | 50 Mbps |
| Isolation Voltage (RMS) | 5000 Vrms | 5000 Vrms | 5000 Vrms | 5000 Vrms | 5000 Vrms | 5000 Vrms |
| CMTI | 150 kV/us | 150 kV/us | 150 kV/us | 100 kV/us | 150 kV/us | 150 kV/us |
| VCC1 Range | 1.71 V to 1.89 V | 1.71 V to 1.89 V | 1.71 V to 1.89 V | 1.71 V to 1.89 V | 1.71 V to 1.89 V | 1.71 V to 1.89 V |
| AEC-Q100 Automotive | No | No | No | Yes | No | No |
主な差別化要因
- All-six-channels-forward (6/0) configuration in same package （vs ISO6762DWR)
- Pin-compatible 100 Mbps upgrade path （vs ISO7760FDWR)
- 1.8 V native logic input on side 1 （vs Generic 5 V isolators)
設計ノート
Place 0.1 uF and 1 uF ceramic bypass capacitors as close as possible to VCC1 (pin 1) and VCC2 (pin 16) to meet the 1 ns rise-time decoupling requirement specified in the TI datasheet. Use X7R dielectric for the 1 uF bulk capacitor to minimize capacitance derating at 125 C. Keep the bypass-capacitor ground via within 2 mm of the device GND1 pin (pin 9) to minimize parasitic inductance on the high-di/dt transient paths.
The 16-SOIC wide-body package provides 10.0 mm minimum creepage and clearance per IEC 60747-17. Maintain a continuous barrier across the PCB — do not route any copper trace beneath the package body or between the SOIC leads. Per the TI datasheet, placing a grounded copper hatch beneath the package reduces surge-withstand by up to 30 percent; leave the area directly under the SOIC body free of copper, for the IC's rated isolation performance.
Do not use the F-suffix part in applications requiring fail-safe-low output behavior; the F-suffix denotes default-high output state during power-up. If the system requires known-low outputs during power-up (for example, IGBT gate-driver enable signals), choose the non-F variant ISO6760DWR. Also avoid daisy-chaining multiple ISO6760 devices without interstage bypass — the TI datasheet recommends one 1 uF capacitor per device, not shared.
The high CMTI of ±150 kV/us makes the ISO6760FDWR robust against fast dv/dt edges from SiC MOSFETs and IGBTs. However, long input traces (>50 mm) on the side-1 (1.8 V) side can pick up noise that corrupts the OOK signaling. The TI datasheet recommends keeping side-1 traces below 25 mm, with a ground guard trace on both sides. For motor-drive applications, place the device within 30 mm of the gate-driver IC to minimize common-mode loop area.
コンプライアンス情報
ROHS3 compliant per PartGenie.ai listing; REACH status [DATA_NEEDED] - not in provided data. MSL Level 2, 260 C, 1 year per PartGenie datasheet. UL 1577 and IEC 60747-17 certified per TI datasheet. Choose -Q1 suffix variant for AEC-Q100 automotive applications.
