N25Q128A13ESEA0F - 128Mb 3V SPI NOR Flash, SOP-8 | Micron
部品番号: N25Q128A13ESEA0F ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $1.85 | $1.85 |
| 10 | $1.82 | $18.20 |
| 100 | $1.74 | $174.00 |
| 500 | $1.7 | $850.00 |
| 1,000 | $1.65 | $1,650.00 |
N25Q128A13ESEA0F 概要
Serial NOR Flash is a nonvolatile memory category that stores code and data and executes in place (XIP), sitting within the memory IC hierarchy: serial NOR flash -> NOR flash -> flash memory -> nonvolatile semiconductor memory. Unlike NAND flash, NOR flash offers random byte-level access and high read reliability, making it the standard boot-memory technology for embedded processors and microcontrollers.
Key features include 128Mb density organized as 16M x 8, multiple I/O operation (standard SPI, Dual SPI 2x I/O, and Quad SPI 4x I/O) that scales read bandwidth without changing packages, and 4KB subsector erase granularity for efficient parameter storage. The 3V supply family supports fast clocked reads essential for XIP code execution.
Architecturally, the device uses Micron's pulse-trained command set with dedicated instructions for page program, sector erase, chip erase, and status polling, and supports quad I/O commands that transfer four bits per clock cycle to accelerate boot and code-fetch workloads.
Typical applications include BIOS/UEFI code storage on x86 platforms, boot flash for embedded ARM and network processors, firmware storage in industrial control systems, and automotive electronics modules, where XIP execution and long-term data retention are required.
Design consideration: verify that your host controller supports the N25Q command set (Micron pulse protocol) or enable the Spansion-compatible extended command set; also budget erase times for 4KB subsector operations in firmware update routines.
This page synthesizes distributor pricing, drop-in alternatives including the Winbond W25Q128JVSJQTR cross-reference, and practical design notes not found in the manufacturer datasheet.
ドロップイン代替品: N25Q128A13ESEA0F — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: N25Q128A13ESEA0F （同一形状・フットプリント） — 相違点: Memory Type, Organization, Density, Interface, Package.
クイック比較ツール — 並列比較する代替部品を選択:
N25Q128A13ESE40F
✅ ドロップイン📋 参考代替品（カタログ未掲載）
N25Q128A11ESEA0F
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
N25Q128A13E1240F
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
N25Q128A11E1240F
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
W25Q128JVSJQTR
✅ ドロップイン📋 参考代替品（カタログ未掲載）
N25Q128A13ESEA0F 最大定格＆電気的特性
| メモリタイプ | Nonvolatile Flash - NOR Flash, Serial (SPI) |
| Density | 128 Mb (16 MB) |
| メモリ構成 | 16M x 8 |
| 電源電圧 | 3 V (2.7 V to 3.6 V) |
| インターフェース | SPI Multiple I/O (Standard / Dual / Quad) |
| Sector Erase Size | 4 KB |
| 動作温度 | -40C to +85C |
| パッケージ | SOP-8 (8-terminal, square, plastic/epoxy body) |
| 実装タイプ | Surface Mount |
| Number of Terminals | 8 |
| Package Body Material | Plastic/Epoxy |
| Temperature Grade | Automotive-capable grade per distributor listing |
| RoHS ステータス | Compliant / Lead Free |
| Erase Granularity | 4KB Sector Erase supported |
N25Q128A13ESEA0F ピン構成
| ピン 1 | /CS — Chip select (active low) |
| ピン 2 | DO (IO1) — Serial data output / quad data line 1 |
| ピン 3 | /WP (IO2) — Write protect (active low) / quad data line 2 |
| ピン 4 | GND — Ground |
| ピン 5 | DI (IO0) — Serial data input / quad data line 0 |
| ピン 6 | CLK — Serial clock input |
| ピン 7 | /HOLD (IO3) — Hold (active low) / quad data line 3 |
| ピン 8 | VCC — Power supply (2.7V to 3.6V) |
主な用途
N25Q128A13ESEA0F の用途: 6 件s: BIOS/UEFI Code Storage, Embedded ARM Boot Flash, Industrial Control Systems, Automotive Electronics Modules, Networking and Telecom Equipment, Consumer Electronics Firmware Storage.
BIOS/UEFI Code Storage
The N25Q128A13ESEA0F serves as boot firmware storage on x86 motherboards and server platforms, where its 128Mb (16MB) density accommodates modern UEFI images with options ROMs. Quad SPI mode multiplies read bandwidth 4x versus standard SPI at the same clock rate, directly shortening POST and boot times during execute-in-place or shadow-to-RAM loading. The 4KB sector erase granularity allows BIOS update utilities to rewrite only changed blocks without a full-chip erase cycle. Placed on the SPI bus routed to the chipset's SPI controller with 10k-ohm pull-up on /CS and /HOLD, the device replaces larger parallel flash footprints while consuming minimal board area in the 8-terminal SOP package.
おすすめ
Embedded ARM Boot Flash
Embedded ARM Cortex-A and Cortex-M systems use the N25Q128A13ESEA0F as XIP boot memory for bootloader and application code. The 3V (2.7V-3.6V) supply matches common system rails, and -40C to +85C operation covers industrial environments. Quad I/O commands fetch four bits per clock, enabling fast code execution directly from flash without RAM shadowing - valuable on memory-constrained MCUs. Firmware over-the-air updates benefit from 4KB sector erase, allowing parameter tables and application images to be erased and reprogrammed independently. Designers should reserve the 64-byte page program boundary and poll the status register before issuing the next command, per the Micron command protocol.
おすすめ
Industrial Control Systems
In industrial control and automation modules, the N25Q128A13ESEA0F stores firmware, device profiles, and logged parameter data. The -40C to +85C industrial temperature range and plastic SOP-8 package withstand factory-floor thermal cycling, while NOR flash reliability suits code storage that is read constantly but rewritten infrequently. The 16M x 8 organization and 4KB subsector erase support structured firmware/parameter partitions without wear-leveling complexity typical of NAND. Its 2.7V-3.6V supply tolerance rides through brownouts common on industrial 24V-derived rails. Follow datasheet write-protect practice by asserting /WP during normal operation to prevent corruption from power glitches.
おすすめ
Automotive Electronics Modules
Distributor Partstack lists the N25Q128A13ESEA0F with automotive temperature grade, and the part is used in telematics units, body control modules, and infotainment boot storage at the -40C to +85C operating window. NOR flash XIP capability lets the host processor boot directly from the device during power-on, and quad SPI reduces boot latency - important for modules with wakeup-from-sleep timing requirements. The 3V supply integrates with standard automotive 5V-derived LDO rails. For designs requiring formally documented AEC-Q100 qualification, verify the specific flow of this ordering code with Micron or select the dedicated automotive flow variant of the same N25Q128A die and footprint.
おすすめ
Networking and Telecom Equipment
Routers, switches, and telecom line cards use the N25Q128A13ESEA0F as boot code and configuration storage for network processors and FPGA configuration images. The 128Mb density holds multiple FPGA bitstreams or a bootloader plus OS image, and dual/quad SPI read modes keep configuration load times within line-card bring-up budgets. 4KB sector erase permits granular revision storage for redundant firmware images and rollback support. The compact 8-terminal SOP footprint fits dense line-card layouts, and the standard SPI pinout simplifies second-source qualification against the Winbond W25Q128JVSJQTR cross-reference on the same land pattern.
おすすめ
Consumer Electronics Firmware Storage
Set-top boxes, smart appliances, and display modules use the N25Q128A13ESEA0F to store application firmware, UI assets, and user settings. The 16MB capacity accommodates modern firmware with graphics assets, while 4KB sector erase allows user preference tables to be updated independently of the main image, extending effective flash endurance in the field. Low pin count (8 terminals) and small SOP-8 body fit cost-sensitive PCB layouts, and the 2.7V-3.6V supply range works directly from single-cell Li-ion or 3.3V regulated rails. At approximately $1.74 per unit at 100 pieces as of 2026-09-04, it delivers strong cost-per-megabit for consumer BOMs.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: N25Q128A13ESEA0F — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | N25Q128A13ESE40F | N25Q128A11ESEA0F | N25Q128A13E1240F | W25Q128JVSJQTR |
|---|---|---|---|---|---|
| Package | SOP-8 | SOP-8 - same | SOP-8 - same | SOP-8 - same | SOIC-8 - same footprint |
| Brand | Micron Technology | Micron Technology | Micron Technology | Micron Technology | Winbond |
| Density | 128 Mb (16 MB) | 128 Mb | 128 Mb | 128 Mb | 128 Mb |
| Supply Voltage | 2.7 V to 3.6 V (3V class) | 2.7 V to 3.6 V | 2.7 V to 3.6 V | 2.7 V to 3.6 V | 2.7 V to 3.6 V |
| Interface | SPI Multiple I/O (Standard/Dual/Quad) | SPI Multiple I/O (Standard/Dual/Quad) | SPI Multiple I/O | SPI Multiple I/O | SPI (Standard/Dual/Quad) |
| Sector Erase Size | 4 KB | 4 KB | 4 KB | 4 KB | 4 KB |
| Command Set | Micron N25Q (pulse protocol) with extended SPI options | Micron N25Q - same | Micron N25Q - same family | Micron N25Q - same family | Winbond standard SPI command table |
主な差別化要因
- Higher industrial-grade temperature coverage within same family （vs N25Q128A13ESE40F)
- Micron N25Q pulse protocol with extended command set for validated XIP platforms （vs W25Q128JVSJQTR)
- In-stock availability at ~$1.85 unit price （vs N25Q128A13E1240F)
設計ノート
Keep the SPI bus traces short (under 15 cm) and route CLK away from IO0-IO3 to minimize crosstalk at quad SPI clock rates. Use a series 22-33 ohm resistor on CLK to dampen ringing if trace stubs exceed a few centimeters. Each IO line should have a 10k-ohm pull-up where the host leaves the line tri-state; /CS must not float during power-up or the device may enter an undefined state.
The N25Q family uses Micron's pulse-trained command protocol; hosts written for Winbond/Spansion-standard command tables (e.g., W25Q128JVSJQTR) must enable the N25Q extended command set or remap instructions before migrating. Also poll the status register (write-in-progress bit) between program/erase operations - issuing commands while busy corrupts the operation. Verify /WP is deasserted (high) before any write; holding it low latches block protection unexpectedly.
Decouple VCC (pin 8) with a 0.1 uF ceramic capacitor placed within 5 mm of the pin, plus a 4.7-10 uF bulk capacitor on the 3V rail. The 2.7V minimum supply must be maintained through erase operations; brownouts during sector erase can corrupt data. Implement host-side brown-out detection and block programming during supply transients, or gate writes below 2.8V.
The SOP-8 footprint for N25Q128A13ESEA0F is shared with the W25Q128JVSJQTR second source, so design the land pattern to the wider JEDEC SOIC-8 tolerance so both devices mount without rework. Avoid routing high-current traces under the package; flash read jitter increases with ground bounce on pin 4. Add fiducials near the footprint for automated optical inspection of pin 1 orientation.
コンプライアンス情報
Distributor ICComponents listing states: Lead free / RoHS Compliant. REACH, halogen-free, and conflict-minerals status not stated in provided data. Partstack lists temperature grade as AUTOMOTIVE; formal AEC-Q100 qualification level should be confirmed with Micron for safety-related designs.
