STM32MP157CAC3 - Dual Cortex-A7 650MHz + M4 MPU | ST
部品番号: STM32MP157CAC3 ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $33.1 | $33.10 |
| 10 | $30.5 | $305.00 |
| 100 | $27.9 | $2,790.00 |
| 500 | $25.8 | $12,900.00 |
| 1,000 | $24.2 | $24,200.00 |
STM32MP157CAC3 概要
An MPU (microprocessor unit) is a general-purpose processor that runs rich operating systems such as Linux or Android, unlike a microcontroller (MCU) that executes bare-metal or RTOS firmware from on-chip flash. The STM32MP1 series bridges both worlds: the Cortex-A7 subsystem handles Linux-based user interfaces and networking, while the Cortex-M4 core delivers deterministic real-time control, all on one die. This heterogeneous architecture reduces system complexity and BOM cost compared with a discrete MPU-plus-MCU two-chip solution.
Key features include 2x Ethernet GMAC with 1-Gbps RGMII compliance per IEEE-802.3ab, 2x USB 2.0 OTG, 8x UART, 5x I2C, 5x SPI, 2x CAN FD, an OpenGL ES 2.0-capable 3D GPU, MIPI DSI display interface, and a 12-bit ADC with up to 16 channels. Memory support spans 16-bit DDR3/DDR3L/LPDDR2/LPDDR3 plus NAND, NOR, and SRAM controllers. A cryptographic accelerator covers AES, DES, 3DES, SHA-1, SHA-256, and MD5 with secure boot support.
The device is fabricated on a 28nm FD-SOI process, delivering roughly 1300 DMIPS from the dual Cortex-A7 cores plus 240 DMIPS from the Cortex-M4, with multiple low-power modes (Sleep, Stop, Standby). Core voltage is 1.2 V with I/O rails from 1.8 V to 3.3 V.
Typical applications include industrial HMI panels, smart home and IoT gateways, medical monitoring devices, and edge nodes needing Linux connectivity alongside hard real-time motor control or sensor acquisition on the M4 core.
Design consideration: use the STPMIC1 PMIC for the required multi-rail power sequencing (VDD, VDD_CPU, VDD_IO) and apply impedance-controlled DDR3 routing with proper termination for signal integrity.
This page synthesizes distributor pricing, drop-in same-family alternatives, and practical design notes not found in the manufacturer datasheet.
ドロップイン代替品: STM32MP157CAC3 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: STM32MP157CAC3 （同一形状・フットプリント） — 相違点: Core Processor, Package, Number of Cores, Security, Series.
クイック比較ツール — 並列比較する代替部品を選択:
STM32MP157CAD3
✅ ドロップイン📋 参考代替品（カタログ未掲載）
STM32MP157CAD3T
✅ ドロップイン📋 参考代替品（カタログ未掲載）
STM32MP153CAC3
✅ ドロップイン✓ 在庫あり
価格はお問い合わせください
データシートを見る →STM32MP157FAD7
✅ ドロップイン✓ 在庫あり
$16.8 / 個
データシートを見る →STM32MP151AAD3
✅ ドロップイン✓ 在庫あり
$7.42 / 個
データシートを見る →STM32MP133CAG3
✅ ドロップイン📋 参考代替品（カタログ未掲載）
STM32MP157CAC3 最大定格＆電気的特性
| Core Processor | Dual Arm Cortex-A7 + Arm Cortex-M4 |
| Cortex-A7 Max Frequency | 650 MHz |
| Cortex-M4 Max Frequency | 209 MHz |
| Architecture | 32-bit, 2+1 core heterogeneous |
| Series | STM32MP1 |
| Ethernet | 2x GMAC, 1-Gbps RGMII (IEEE-802.3ab) |
| USB | 2x USB 2.0 OTG |
| UART | 8x |
| SPI | 5x |
| I2C | 5x |
| CAN | 2x CAN FD |
| GPU | 3D GPU (OpenGL ES 2.0) |
| Display Interface | TFT / MIPI DSI |
| DRAM Controller | 16-bit DDR3/DDR3L/LPDDR2/LPDDR3 |
| Security | Crypto accelerator (AES, DES, 3DES, SHA-1, SHA-256, MD5), secure boot |
| 動作温度 | -40C to +125C |
| パッケージ | 361-TFBGA (12x12 mm) |
| 実装タイプ | Surface Mount |
| RoHS ステータス | Compliant |
STM32MP157CAC3 361-tfbga (12x12 mm) ピン配置ガイド
STM32MP157CAC3 (361-tfbga (12x12 mm) パッケージ) のピン配置。 このデジタルICには、GPIO、通信インターフェース (UART、SPI、I2C)、および電源ピンが含まれています。代替ピン機能と設定オプションについては、メーカーのデータシートを参照してください。組み込みシステム設計とPCBレイアウトに不可欠です。
詳細なピン配置データはありません: STM32MP157CAC3.
詳細は データシート をご参照ください。
主な用途
STM32MP157CAC3 の用途: 6 件s: Industrial HMI Panels, Smart Home and IoT Gateways, Medical Monitoring Devices, Edge AI and Vision Nodes, Building Automation Controllers, Consumer Appliances with Displays.
Industrial HMI Panels
The STM32MP157CAC3 fits industrial human-machine interface panels because its 3D GPU (OpenGL ES 2.0) and MIPI DSI display controller drive touchscreen UIs while the dual Cortex-A7 at 650 MHz runs Linux-based visualization software. Industrial protocols ride on 2x Ethernet GMAC (1-Gbps RGMII per IEEE-802.3ab), 2x CAN FD, and 8x UART, letting one chip replace an MPU plus separate fieldbus controller. The Cortex-M4 at 209 MHz handles safety-critical I/O scanning deterministically under OpenAMP. Its -40C to +125C rating and secure boot via the crypto accelerator (AES, SHA-256) satisfy factory-floor robustness and firmware integrity requirements that consumer-grade application processors cannot meet.
おすすめ
Smart Home and IoT Gateways
Smart home and IoT edge gateways benefit from the STM32MP157CAC3's combination of Linux-capable dual Cortex-A7 cores and rich connectivity: 2x Ethernet for WAN/LAN bridging, 2x USB 2.0 OTG for cellular or Wi-Fi dongles, and SDMMC for storage. The Cortex-M4 coprocessor continuously samples Zigbee, Thread, or sensor radio interfaces at 209 MHz while Linux manages cloud connectivity, cutting latency for local automation rules. The cryptographic accelerator covering AES and SHA-256 with secure boot secures OTA firmware updates, a hard requirement for consumer IoT. Multiple low-power modes (Sleep, Stop, Standby) on the 28nm FD-SOI process reduce standby consumption for always-on wall-powered gateways.
おすすめ
Medical Monitoring Devices
The STM32MP157CAC3 serves medical monitoring equipment where the -40C to +125C industrial grade, deterministic Cortex-M4 core, and secure boot chain support regulatory-oriented designs. The M4 at 209 MHz acquires physiological signals from the 12-bit, 16-channel ADC with hard real-time timing, while dual Cortex-A7 cores at 650 MHz run the Linux UI, charting, and network telemetry over 1-Gbps Ethernet or USB. The cryptographic engine (AES, 3DES, SHA-256, MD5) protects patient-data links and authenticated firmware. A single heterogeneous device consolidates signal chain control and UI processing, shrinking the BOM of bedside monitors, infusion interfaces, and portable diagnostic terminals.
おすすめ
Edge AI and Vision Nodes
For edge nodes that preprocess camera or sensor data, the STM32MP157CAC3 provides Linux-level connectivity and application logic while offloading deterministic sampling to the Cortex-M4. Although the 3D GPU targets graphics rather than neural inference, the dual Cortex-A7 at 650 MHz (about 1300 DMIPS total) runs lightweight vision preprocessing, and the MIPI DSI/TFT pipeline outputs local previews. Gigabit RGMII Ethernet streams processed data to servers; CAN FD and UART link to actuators. Designers needing heavier inference pair this MPU with an external accelerator over USB or Ethernet, using the STM32MP157CAC3 as the deterministic control and communications hub of the node.
おすすめ
Building Automation Controllers
Building automation controllers use the STM32MP157CAC3 to merge BMS protocol gateways and local control loops on one die. Two CAN FD interfaces and dual GMAC Ethernet (IEEE-802.3ab RGMII) carry BACnet/MS-TP and IP traffic, while 5x SPI, 5x I2C, and 8x UART connect HVAC sensors, meters, and drivers. The Cortex-M4 executes deterministic control loops (damper, valve, PID) at 209 MHz independent of Linux maintenance and reboots on the Cortex-A7 side, improving availability. Secure boot and the crypto accelerator protect controller firmware in accessible building infrastructure, and the -40C to +125C range covers rooftop and mechanical-room environments.
おすすめ
Consumer Appliances with Displays
Connected appliances - coffee machines, ovens, thermostats with rich UIs - map well to the STM32MP157CAC3: the 3D GPU and MIPI DSI interface render animated touch interfaces, dual Cortex-A7 cores run Linux application stacks with Wi-Fi/BLE dongles on USB 2.0 OTG, and the Cortex-M4 manages motor, heater, and sensor loops in real time. The 28nm FD-SOI process and Standby mode cut standby power toward regulatory limits. One-chip integration of UI, connectivity, and control displaces an MCU-plus-processor two-chip design, reducing BOM cost and certification surface, while STMicroelectronics' long-lifetime industrial-grade commitment suits appliance service-life expectations.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: STM32MP157CAC3 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | STM32MP157CAD3 | STM32MP153CAC3 | STM32MP157FAD7 | STM32MP151AAD3 | STM32MP133CAG3 |
|---|---|---|---|---|---|---|
| Package | 361-TFBGA (12x12 mm) | 361-TFBGA - same | 361-TFBGA - same | 361-TFBGA - same | 361-TFBGA - same | 361-TFBGA - same |
| Brand | STMicroelectronics | STMicroelectronics | STMicroelectronics | STMicroelectronics | STMicroelectronics | STMicroelectronics |
| Cortex-M4 Coprocessor | Yes, 209 MHz | Yes | Yes | Yes | Yes | Yes |
| 3D GPU | Yes (OpenGL ES 2.0) | Yes | No | Yes | No | No |
| Lifecycle Status | Active | Active | Active | Active | Active | Active |
主な差別化要因
- Integrated 3D GPU and MIPI DSI display subsystem （vs STM32MP153CAC3)
- Dual-core heterogeneity (A7 + M4) on one die （vs STM32MP151AAD3)
- Upgrade path to 800 MHz-class silicon （vs STM32MP157FAD7)
設計ノート
Use the STPMIC1 PMIC rather than discrete regulators: the STM32MP157CAC3 requires strictly sequenced rails (VDD, VDD_CPU, VDD_IO plus DDR supplies), and the STPMIC1 implements the correct order with I2C control. Estimated: a typical Linux design draws core, DDR, and I/O currents summing to roughly 1-3 W depending on CPU load; verify against the datasheet power tables at your actual 650 MHz operating point. Follow the STMicroelectronics STM32MP157x-EV1 reference design for rail sequencing and decoupling placement.
DDR3/LPDDR routing is the leading cause of board bring-up failure on this MPU. Use length-matched, impedance-controlled traces (50 ohm single-ended, 100 ohm differential for clocks), proper on-die termination settings, and reference-plane continuity under the byte lanes. Follow the layout guidelines in the STMicroelectronics datasheet and application notes for the 16-bit DDR interface. Keep DDR traces on layers adjacent to a solid ground plane and avoid crossing plane splits anywhere in the address/data bus.
Boot media configuration is a frequent pitfall: the STM32MP157CAC3 boot pins select NAND, NOR, SDMMC, or eMMC at reset, and an incorrect strap leaves the board unbootable with no diagnostic output. Verify boot mode strapping against the datasheet boot-selection table before first power-up. Also reserve the Cortex-M4 resource partition (RAM region, peripherals) in the device tree when running OpenAMP, or Linux and the M4 will contend for shared peripherals.
コンプライアンス情報
RoHS compliant per standard STMicroelectronics STM32MP1 product listings; REACH and halogen-free status not stated in provided data.
