UCC21550 - 4A/6A 5kVrms Isolated Dual Gate Driver | TI
部品番号: UCC21550 ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $1.75 | $1.75 |
| 10 | $1.58 | $15.80 |
| 100 | $1.42 | $142.00 |
| 500 | $1.33 | $665.00 |
| 1,000 | $1.25 | $1,250.00 |
UCC21550 概要
An isolated gate driver is an integrated circuit that supplies the gate charge current needed to switch power transistors while maintaining galvanic isolation between the low-voltage controller and the high-voltage power stage. Within the power management hierarchy (gate driver -> isolated gate driver -> power management IC), isolation is critical for safety, noise immunity, and level-shifting in high-voltage systems such as motor drives and solar inverters.
Key features include the high 4A/6A peak currents that rapidly charge and discharge large gate capacitances, reducing switching losses in SiC and GaN converters. Programmable dead time, set by a resistor on the DT pin, prevents shoot-through in half-bridge topologies. Capacitive silicon-dioxide isolation technology provides high common-mode transient immunity (CMTI), essential when switching fast SiC devices at high dv/dt. Undervoltage lockout (UVLO) on both input and output supplies protects against brownout conditions, and the family offers multiple UVLO and dead-time grade options (A/B/C variants).
Technically, the UCC21550 transfers PWM signals across a capacitive isolation barrier with low propagation delay and tight channel-to-channel matching, according to TI datasheet UCC21550 (46 pages).
Typical applications include switch-mode power supplies, solar string inverters, motor drives, EV onboard chargers, and industrial power conversion. The wide temperature range and reinforced isolation suit automotive and industrial environments (an AEC-Q100 qualified UCC21550x-Q1 family is available).
Design tip: place the driver close to the power transistors to minimize gate-loop parasitic inductance, and size the DT resistor dead time to the switching characteristics of the connected transistors to prevent shoot-through.
ドロップイン代替品: UCC21550 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: UCC21550 （同一形状・フットプリント） — 相違点: Package, Isolation Rating, Isolation Technology, CMTI, Input Threshold.
クイック比較ツール — 並列比較する代替部品を選択:
UCC21540
✅ ドロップイン✓ 在庫あり
$1.85 / 個
データシートを見る →UCC21550Q-Q1
✅ ドロップイン✓ 在庫あり
$2.1 / 個
データシートを見る →UCC21550ADWR
✅ ドロップイン✓ 在庫あり
$1.19 / 個
データシートを見る →UCC21520
✅ ドロップイン✓ 在庫あり
$1.55 / 個
データシートを見る →UCC21521DWR
✅ ドロップイン✓ 在庫あり
$2.15 / 個
データシートを見る →UCC21530Q-Q1
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
$2.1 / 個
データシートを見る →ZC21550
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
UCC21550 最大定格＆電気的特性
| チャネル数 | 2 (dual-channel) |
| Peak Source Current | 4 A |
| Peak Sink Current | 6 A |
| Isolation Rating | 5000 Vrms (reinforced, UL1577) |
| Isolation Technology | Capacitive (silicon dioxide) |
| Configurations | Dual low-side, dual high-side, or half-bridge |
| Supported Transistors | MOSFET, SiC, GaN, IGBT |
| Dead Time | Programmable via DT pin resistor |
| UVLO | Yes, on input and output supplies (A/B/C grade options) |
| 動作温度 | -40C to +150C |
| パッケージ | 16-SOIC (DW, 300 mil) |
| 実装タイプ | Surface Mount |
| Automotive Qualification | UCC21550x-Q1 family AEC-Q100 qualified |
| RoHS ステータス | Compliant |
UCC21550 ピン構成
| ピン 1 | VCCI — Input-side supply voltage |
| ピン 2 | GND — Input-side ground |
| ピン 3 | INH — Input H (high-side channel input) |
| ピン 4 | INL — Input L (low-side channel input) |
| ピン 5 | DIS — Disable input (device-dependent per variant) |
| ピン 6 | DT — Dead-time programming resistor pin |
| ピン 8 | VEA — [DATA_NEEDED: confirm secondary-side naming per datasheet] |
| ピン 9 | OUTA — [DATA_NEEDED: confirm output pin naming] |
| ピン 16 | VDDA — [DATA_NEEDED: confirm output supply pin] |
| ピン 12 | COMB — [DATA_NEEDED: confirm B-channel ground] |
主な用途
UCC21550 の用途: 6 件s: Switch-Mode Power Supplies (SMPS), Solar String Inverters, Motor Drives, EV Onboard Chargers, GaN and SiC High-Frequency Converters, Industrial Power Conversion and UPS.
Switch-Mode Power Supplies (SMPS)
The UCC21550's 4A/6A peak drive currents rapidly charge large gate capacitances in half-bridge and full-bridge SMPS power stages, minimizing switching losses at 100-500kHz. Its programmable dead time via the DT pin precisely sets anti-shoot-through intervals for IGBT or SiC bridges, while 5000Vrms reinforced isolation safely separates the PWM controller from the high-voltage primary. UVLO on both input and output supplies prevents under-driven operation during brownout, protecting power transistors from partial-conduction failures.
おすすめ
Solar String Inverters
In solar string inverters, the UCC21550 drives SiC or IGBT half-bridge stages where 5000Vrms reinforced isolation per UL1577 is mandatory for grid-tied safety. The capacitive isolation barrier's high CMTI tolerates the steep dv/dt of fast SiC switching without corruption, and the -40C to +150C range covers outdoor environmental extremes. The 6A peak sink current firmly holds gates low during miller-clamp-critical turn-off transitions, reducing cross-conduction risk in the bridge.
おすすめ
Motor Drives
Industrial motor drives use the UCC21550 as a half-bridge gate driver for three-phase inverters. The 4A source current switches IGBTs and SiC MOSFETs efficiently at inverter PWM frequencies, while programmable dead time (DT pin resistor) is tuned per device datasheet turn-off characteristics to eliminate shoot-through. Its two channels with tight matching simplify per-phase bridge design, and the 16-SOIC package allows compact placement adjacent to each power module, minimizing gate-loop inductance and ringing.
おすすめ
EV Onboard Chargers
For EV onboard chargers, the AEC-Q100 qualified UCC21550x-Q1 family provides the automotive robustness, 5000Vrms reinforced isolation, and 4A/6A drive strength required for PFC and LLC bridge stages. The wide -40C to +150C temperature range suits underhood-adjacent packaging, and UVLO grade options (A/B/C variants) let designers match UVLO thresholds to SiC gate-drive supply architectures, ensuring complete turn-off during supply faults and meeting functional-safety isolation requirements.
おすすめ
GaN and SiC High-Frequency Converters
Wide-bandgap converters benefit from the UCC21550's combination of high peak current (4A source / 6A sink) and high CMTI capacitive isolation, which tolerates the extreme dv/dt slew rates of GaN FET and SiC MOSFET switching. Fast charge and discharge of low gate-charge devices reduces switching transition times and losses at multi-hundred-kHz frequencies. The programmable dead time supports the very short dead times GaN bridges require, maximizing efficiency and minimizing body-diode conduction losses.
おすすめ
Industrial Power Conversion and UPS
UPS systems and industrial DC-DC converters deploy the UCC21550 in isolated bridge stages where 5000Vrms reinforced isolation and reliable UVLO protect against input sags. The dual-channel half-bridge configuration with resistor-programmed dead time simplifies BOM and layout versus discrete driver solutions, and the SOIC-16 package with 300mil creepage supports reinforced-isolation spacing requirements. Designers place the driver close to gate terminals to suppress parasitic ringing during hard-switching events.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: UCC21550 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | UCC21540 | UCC21520 | ZC21550 |
|---|---|---|---|---|
| Package | 16-SOIC (DW, 300mil) | 16-SOIC (DW) - same | 16-SOIC (DW) - same | SOP16 (300mil) - same footprint |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Maxscend (cross-brand) |
| Isolation Rating | 5000 Vrms | 5000 Vrms | 5000 Vrms | 5000 Vrms (SOP16 300mil) |
主な差別化要因
- Programmable dead time via DT pin （vs UCC21520)
- Post-PCN device maturity （vs UCC21540)
- Highest drive strength in TI dual-channel isolated portfolio （vs UCC21530Q-Q1)
設計ノート
Place the UCC21550 as close as possible to the power transistor gate terminals to minimize gate-loop parasitic inductance. Long gate traces with 4A/6A peak currents cause gate ringing and potential spurious turn-on. Use short, wide gate traces, kelvin-source connections, and place the gate resistor directly at the transistor gate pin. Route the DT pin trace short and away from gate-drive nodes to avoid dead-time jitter.
Size the DT-pin resistor dead time to exceed the worst-case turn-off time of the connected transistor (including temperature and current variation) to prevent shoot-through in half-bridge operation. If substituting a pre-PCN UCC21540, TI recommends a DT-pin capacitor greater than 2nF - a value difference that changes dead-time behavior and must be re-verified.
Provide adequate bypassing on both VCCI (input side) and VDD (output side) supplies: at least 100nF ceramic plus 10uF bulk close to the pins. UVLO monitors both supplies, but fast 6A sink pulses can cause local droop below UVLO if decoupling is insufficient, causing output glitching. Choose the A/B/C grade variant whose UVLO threshold matches your gate-drive supply architecture (5V UVLO options exist for some variants).
Driver power dissipation is dominated by gate-charge switching loss: P = Qg x VDD x fsw x 2 channels. For large SiC modules at high frequency, verify the SOIC-16 thermal capability and add copper pour on the output-side PCB area. At -40C to +150C ambient extremes, derate switching frequency or drive current accordingly.
コンプライアンス情報
RoHS compliant per TI product listings. AEC-Q100 applies to the UCC21550x-Q1 automotive family (e.g., UCC21550AQDWRQ1), not the base commercial part. UL1577 5000Vrms reinforced isolation per datasheet.
