ADC12040CIVY vs ADC12DL040CIVS 비교
다음의 상세 나란히 비교: ADC12040CIVY 제조: Texas Instruments 및 ADC12DL040CIVS 제조: Texas Instruments. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Texas Instruments
ADC12DL040CIVS - Dual 12-Bit 40 MSPS 3V ADC | Texas Instruments
ADC12DL040CIVS Nrnd사양 비교
| 파라미터 | ADC12040CIVY | ADC12DL040CIVS |
|---|---|---|
| 브랜드 | Texas Instruments | Texas Instruments |
| 카테고리 | ADC/DAC | ADC/DAC |
| 수명 주기 상태 | 활성 | NRND |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $5.52 | $11.85 |
| 분해능 | 12 bit | 12 Bits |
| 샘플링 속도 | 40 MSPS (min 40 MSPS over temperature) | — |
| Number of Channels | 1 input | 2 (dual, simultaneous sampling) |
| Architecture | Pipelined | Pipelined CMOS |
| 공급 전압 | +5V ±5% (single supply) | — |
| Power Consumption | 340 mW (typ) at 40 MHz | — |
| Differential Non-Linearity (DNL) | ±0.4 LSB (typ) | — |
| Signal-to-Noise Ratio (SNR) | 69 dB (typ) at fIN = 10 MHz | — |
| Effective Number of Bits (ENOB) | 11.2 bits (typ) at fIN = 10 MHz | — |
| Input Type | Differential (single-ended capable) | — |
| Reference Type | External, with internal buffer | — |
| Digital Output Interface | Parallel, CMOS, straight binary | — |
| Digital Output Logic Levels | 2.35V to 5V compatible | — |
| Power Down Mode | On-chip (low quiescent between conversions) | — |
| 동작 온도 범위 | -40C to +85C (industrial) | — |
| 패키지 | 32-LQFP (NEY) 7x7 mm | 64-pin TQFP (PAG) 10x10 mm, surface-mount |
| 실장 유형 | Surface Mount | — |
| Pin Family Compatibility | Pin compatible with ADC12010, ADC12020, ADC12L063, ADC12L066 | — |
| RoHS 상태 | Compliant (NOPB suffix variants only; check exact suffix) | — |
| Sample Rate (per channel) | — | 40 MSPS |
| Analog Supply Voltage | — | 3.0 V (2.7 V to 3.6 V range) |
| Digital Output Driver Supply | — | 2.4 V to 3.6 V (separate DVDD) |
| Power Dissipation (typical) | — | 210 mW |
| Power-Down Mode | — | Yes |
| SNR (fIN = 10 MHz) | — | 69 dB (typical) |
| SFDR (fIN = 10 MHz) | — | 85 dB (typical) |
| DNL (Differential Non-Linearity) | — | ±0.3 LSB (typical) |
| INL (Integral Non-Linearity) | — | [DATA_NEEDED: INL spec] |
| Internal Reference | — | Yes (factory-trimmed, not user-adjustable) |
| Sample-and-Hold | — | Internal, dual |
| Duty Cycle Stabilizer | — | Yes |
| Multiplexed Output Mode | — | Yes (channels share single 12-bit bus) |
| Output Format | — | Straight Binary, offset binary, 2's complement (per pin strapping) |
| Input Clock | — | Single-ended or differential; 50 Ω terminated internally |
| 동작 온도 | — | -40 °C to +85 °C (industrial) |
| MSL (Moisture Sensitivity Level) | — | [DATA_NEEDED: MSL level] |
| Lead Finish / RoHS | — | Lead-free / RoHS status depends on orderable suffix (see datasheet ordering info) |