EP910IPC-50 vs EP910LI-20 비교
다음의 상세 나란히 비교: EP910IPC-50 제조: Altera 및 EP910LI-20 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EP910IPC-50 | EP910LI-20 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $13.85 | $19.95 |
| Product Type | Erasable Programmable Logic Device (EPLD) | — |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Logic Capacity | [DATA_NEEDED: macrocell count / equivalent gates] | — |
| Propagation Delay (tPD) | 50 ns | — |
| Clock-to-Output (tCO) | 35 ns | — |
| Maximum Toggle Frequency | [DATA_NEEDED: fMAX] | — |
| User I/O Pins | 24 | — |
| 패키지 | 40-pin Ceramic DIP (IPC, windowed) | 40-pin Ceramic DIP (Windowed) |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V |
| 동작 온도 | -40C to +85C (industrial) | -40C to +85C (Industrial) |
| Technology | CMOS EPROM cell | CMOS, UV-erasable |
| Programming Method | Off-board EPROM programmer + UV erase | — |
| Erasure Method | UV light through ceramic window (IPC package) | — |
| 실장 유형 | Through-Hole (DIP) | — |
| RoHS 상태 | [DATA_NEEDED: not stated in verified data] | [DATA_NEEDED: RoHS status] |
| Macrocells | — | 24 |
| Maximum Operating Frequency | — | 62 MHz |
| Propagation Delay (tpd) | — | 20 ns |
| Dedicated Inputs | — | 16 |
| I/O Pins | — | 24 |
| Package Type | — | Through-Hole, Ceramic DIP with Quartz Window |
| Temperature Grade | — | Industrial (-40C to +85C) |
| 핀 수 | — | 40 |
| Logic Family | — | EPLD (Erasable PLD) |
| Architecture | — | Sum-of-products macrocell |
| Pin/Package Compatibility | — | Pin-compatible across EP910 family |