EPM5192-1LC vs EPM5192AGC 비교

다음의 상세 나란히 비교: EPM5192-1LC 제조: Altera 및 EPM5192AGC 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM5192-1LC EPM5192AGC
브랜드 Altera Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete Obsolete
재고 상태 In Stock In Stock
단가 (USD) $19.40 $56.00
Family MAX 5000 MAX 5000 (High-Speed, High-Density MAX 5000 Devices)
Device Type CPLD (Complex Programmable Logic Device) UV-Erasable / OTP Complex PLD (EPLD)
Usable Gates 3,750 —
Macrocells 192 192
Logic Array Blocks (LABs) 4 —
User I/O Pins 64 —
Maximum Operating Frequency 62.5 MHz —
Propagation Delay (tpd) [DATA_NEEDED: -1 speed grade tpd in ns] —
공급 전압 5 V [DATA_NEEDED: VCC nominal and tolerance]
Process Technology UV EPROM, erasable windowless CMOS
Programmable Interconnect PIA (Programmable Interconnect Array) —
JTAG Boundary Scan IEEE 1149.1 compliant —
패키지 64-pin Ceramic J-Lead Chip Carrier (LC) 84-pin Ceramic PGA (Pin Grid Array, windowed or windowless)
실장 유형 Surface Mount Through-hole (Pin Grid Array)
동작 온도 0C to +70C (commercial) [DATA_NEEDED: operating temperature range]
RoHS 상태 Non-compliant (ceramic windowless package, lead-bearing termination) Non-compliant (ceramic PGA contains lead; legacy military/industrial grade)
Logic Density — High-density (per MAX 5000 family definition)
Architecture — CMOS, sum-of-products with macrocell output logic
Speed Grade Suffix — C (commercial grade; specific pin-to-pin delay varies by base number -15/-20)
Programmability — UV-erasable (windowed package) / One-Time-Programmable (windowless variant)
Security Bit — Programmable security bit (per MAX 5000 family)
Lifecycle — Obsolete (legacy Altera MAX 5000 family; maintained for long-lifecycle programs)
Programming Support — MAX+PLUS II legacy toolchain / Altera-compatible third-party programmers

데이터시트 & 자료

모든 제품 보기 BOM 생성 견적 요청