EPM5192AGC84-20 vs EPM5192ALC84-15 비교
다음의 상세 나란히 비교: EPM5192AGC84-20 제조: Altera 및 EPM5192ALC84-15 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM5192AGC84-20 | EPM5192ALC84-15 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $41.20 | $13.20 |
| Product Type | Complex Programmable Logic Device (CPLD) | — |
| Family | MAX 5000 | — |
| Macrocells | 192 | 192 |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| Logic Gates (typical) | [DATA_NEEDED: typical gate count] | — |
| Maximum Clock Frequency (fMAX) | 66.7 MHz | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Speed Grade | -20 | — |
| 패키지 | 84-pin Ceramic Pin Grid Array (CPGA, WPGA) | 84-pin PLCC (QCCJ, J-bend ceramic) |
| Package Code | WPGA | QCCJ |
| Erasure Method | UV-Erasable (with OTP window) | — |
| Process Technology | CMOS | CMOS (EPROM-based) |
| Operating Temperature Grade | Commercial | Commercial |
| 공급 전압 | [DATA_NEEDED: VCC range] | — |
| I/O Standard | 5V CMOS / TTL compatible | — |
| RoHS 상태 | [DATA_NEEDED: RoHS compliance] | — |
| 실장 유형 | Through-Hole (Pin Grid Array socket) | — |
| Device Family | — | MAX 5000 (EPM5192) |
| Device Type | — | CPLD / UV-Erasable / OTP Complex PLD |
| Propagation Delay (tPD) | — | 15 ns |
| Propagation Delay (Industry Variant) | — | 25 ns (per MicrochipUSA listing) |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (nominal 5 V) |
| Programmability | — | UV-erasable window / OTP |
| Terminal Form | — | J-BEND |
| Package Shape | — | SQUARE |
| Architecture | — | Programmable Logic Array + Macrocell Registers + PIA interconnect |