EPM5192AQM100-15 vs EPM5192AQM100-20 비교

다음의 상세 나란히 비교: EPM5192AQM100-15 제조: Altera 및 EPM5192AQM100-20 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM5192AQM100-15 EPM5192AQM100-20
브랜드 Altera Intel
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete Obsolete
재고 상태 In Stock In Stock
단가 (USD) $16.20 $8.20
Family MAX 5000 —
Device Type EPLD (Erasable PLD) —
Logic Array Blocks (LABs) 12 —
Interconnect Architecture Product Term Sharing (PIA) —
User I/O Pins 64 —
Dedicated Inputs 7 7
Total Inputs 72 —
Pin-to-Pin Delay (tPD) 25 ns —
Speed Grade -15 (15 ns macrocell delay) —
패키지 PQFP-100 (R-PQFP-G100) 100-pin PQFP (JESD-30 code R-PQFP-G100)
Process Technology CMOS CMOS EPROM-based
Programming Technology EPROM (UV-erasable) —
공급 전압 5 V (typical, single supply) [DATA_NEEDED: VCC range from datasheet]
실장 유형 Surface Mount Surface Mount
RoHS 상태 [DATA_NEEDED: RoHS status] [DATA_NEEDED: verified from manufacturer product page]
동작 온도 [DATA_NEEDED: operating temperature range] —
Device Family — MAX 5000 (EPLD / classic CPLD)
Logic Elements — 192 macrocells across 12 Logic Array Blocks (LABs)
Number of LABs — 12
User I/O Lines — 64
Pin-to-Pin Propagation Delay (tPD) — 33 ns
Maximum Clock Frequency (fMAX) — 66.7 MHz
Configuration Memory — On-chip EPROM (non-volatile, one-time programmable in this package)
Boundary-Scan Test — JTAG / IEEE 1149.1 compatible
External Clock Input — Yes (global clock pin)
Operating Temperature Grade — [DATA_NEEDED: explicit temperature grade from datasheet]

데이터시트 & 자료

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