EPM7128SQC100-7 vs EPM7128SQC100-15 비교
다음의 상세 나란히 비교: EPM7128SQC100-7 제조: Intel 및 EPM7128SQC100-15 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Intel
EPM7128SQC100-7 - 128-Macro 5V CPLD, 7.5ns, 100-Pin PQFP | Altera (Intel)
EPM7128SQC100-7 Obsolete
사양 비교
| 파라미터 | EPM7128SQC100-7 | EPM7128SQC100-15 |
|---|---|---|
| 브랜드 | Intel | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | 최종 구매 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $10.85 | $8.20 |
| Product Type | CPLD - Complex Programmable Logic Device | — |
| Family | MAX 7000S | MAX 7000 |
| Macro Cells | 128 | — |
| Usable Gates | 2,500 | — |
| User I/Os | 84 | 84 |
| Logic Elements / LABs | 4 Logic Array Blocks (LABs) | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Maximum Internal Frequency | 125 MHz | — |
| Supply Voltage (VCCINT/VCCIO) | 5.0 V | — |
| Technology | CMOS, EEPROM-based, non-volatile | — |
| 패키지 | 100-pin PQFP (Plastic Quad Flat Pack) | 100-pin PQFP (Plastic Quad Flat Pack) |
| Programming Interface | JTAG (IEEE Std 1149.1), in-system programmable | — |
| 동작 온도 | [DATA_NEEDED: operating temperature range] | 0C to +70C (Commercial) |
| 실장 유형 | Surface Mount | Surface Mount |
| RoHS 상태 | Non-RoHS (legacy SnPb package) | Non-compliant (SnPb lead finish - legacy PQFP) |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 128 |
| Logic Array Blocks (LABs) | — | 4 (16 macrocells each) |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Maximum Frequency (fMAX) | — | [DATA_NEEDED: fMAX value] |
| Typical Gate Count | — | 2,500 gates |
| Supply Voltage (VCCINT) | — | 5 V (5% tolerance) |
| Programming Technology | — | EEPROM (in-system programmable via JTAG) |
| JTAG Interface | — | IEEE Std. 1149.1 compliant |
| MSL 레벨 | — | 3 (168 hours) |