EPM9560RI208-15N vs EPM9320RI208-20N 비교

다음의 상세 나란히 비교: EPM9560RI208-15N 제조: Altera 및 EPM9320RI208-20N 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM9560RI208-15N EPM9320RI208-20N
브랜드 Altera Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete NRND
재고 상태 In Stock In Stock
단가 (USD) $19.45 $0.00
Manufacturer Altera (Intel Programmable Solutions Group) —
Device Family MAX 9000 MAX 9000 (EPM9320)
Device Type EPLD (Erasable Programmable Logic Device) —
Architecture Multiple Array MatriX (MAX), 3rd generation —
Configuration Memory CMOS EEPROM, in-system programmable EEPROM (non-volatile)
패키지 208-pin RQFP (Ruggedized Quad Flat Pack) 208-pin PQFP (Plastic Quad Flat Pack)
Total Pins 356 (per third-party catalog; see _validation_note) —
Package Pin Count 208 —
Terminal Form Gull Wing —
Package Code HFQFP —
User I/Os 216 (per DigiChip specification; see _validation_note) —
Maximum Internal Frequency 145 MHz —
Propagation Delay (tPD) 11.4 ns (15 ns speed grade) 20 ns
Speed Grade -15 —
공급 전압 5.0 V —
동작 온도 0C to 70C (Commercial) —
Temperature Grade Industrial (per Vyrian/Partstack listings) —
Logic Family CMOS —
Programming Interface IEEE 1149.1 JTAG, 5.0-V in-system —
RoHS 상태 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Logic Type — EEPROM-based Complex Programmable Logic Device (CPLD)
Macrocells — 320
Flip-Flops — 484
Supply Voltage (VCC) — 5.0 V
I/O Voltage Tolerance — 3.3 V or 5 V configurable
Package Lead Pitch — 0.500 mm
Number of Terminals — 208
동작 온도 범위 — -40C to +85C (Industrial)
In-System Programmability — Yes, 5.0 V ISP via JTAG
JTAG Interface — IEEE Std. 1149.1 compliant
Dedicated Input Pins — 4 (low-skew global distribution)
Minimum DC Input on I/O Pins — -0.5 V
Minimum DC Input on Dedicated Inputs — -0.3 V
Input Undershoot/ Overshoot — -2.0 V / 7.0 V for <20 ns (no-load)
실장 유형 — Surface Mount

데이터시트 & 자료

모든 제품 보기 BOM 생성 견적 요청