PI3DPX1202A1ZBE - 5.4Gbps DisplayPort 1.2 Redriver | Diodes Inc
부품 번호: PI3DPX1202A1ZBE ✓ 활성| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $2.95 | $2.95 |
| 10 | $2.65 | $26.50 |
| 100 | $2.35 | $235.00 |
| 500 | $2.05 | $1,025.00 |
| 1,000 | $1.78 | $1,780.00 |
PI3DPX1202A1ZBE 개요
A signal buffer/redriver is a linear or adaptive repeater placed in series with a high-speed serial channel to compensate for channel loss caused by PCB traces, connectors, cables, or inter-symbol interference. It restores signal amplitude and rise/fall times without re-timing the data (a redriver is protocol-transparent), which is critical for DisplayPort, HDMI, USB 3.0, and PCIe Gen2/Gen3 links where budgets may be exceeded by the physical medium. Within the broader component taxonomy, a redriver sits below retimers (which recover clock/data) and above simple repeaters, and it belongs to the Interface ICs > Signal Buffers, Repeaters family of mixed-signal analog conditioning products.
Key features include 5.4 Gbps per-lane support (DisplayPort HBR2), adaptive equalization to compensate for frequency-dependent channel loss, transmit de-emphasis to reduce inter-symbol interference at the source, integrated DDC/AUX switch for source/sink routing, low standby current, and 3.3 V single-supply operation. The TQFN-48 (7x7 mm) package with exposed pad provides a low thermal resistance path for surface-mount designs.
Internally, the redriver combines a CTLE-style adaptive equalizer at each input with a fixed or selectable de-emphasis driver at each output, plus auxiliary logic for DDC/AUX channel switching. The equalizer extends the usable channel length at HBR2 (5.4 Gbps) where 28 AWG cable losses exceed 10 dB at the Nyquist frequency. The DDC/AUX switch supports bidirectional auxiliary and EDID transactions without an external mux.
Typical applications include notebook docking stations, monitor input panels, DisplayPort dongles and adapters, embedded display boards, video capture cards, and any compact DisplayPort source/sink where PCB trace or cable length exceeds the native 8-10 dB loss budget at HBR2 rates.
When designing with this part, place it within 4 inches of the DisplayPort connector; provide a solid 3.3 V decoupling network (10 uF bulk + 0.1 uF/0.01 uF high-frequency) at VCC; and route the high-speed TX/RX pairs with 100 ohm differential impedance and length matching within 5 mils per pair.
This page synthesizes distributor pricing, drop-in same-package alternatives from the Diodes DisplayPort redriver family, DDC/AUX mux companion parts, and practical PCB layout notes not aggregated in the manufacturer datasheet.
드롭인 대체품: PI3DPX1202A1ZBE — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
이 시리즈의 변형
다음과 드롭인 호환되는 동일 시리즈 모델: PI3DPX1202A1ZBE (동일 폼 팩터 및 풋프린트) — 차이점: Function, Package.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
PI3DPX1202A1
✅ 드롭인 ⚠️ 사양 미검증📋 참조 대체품 (카탈로그에 없음)
PI3DPX1203A1ZBE
✅ 드롭인 ⚠️ 사양 미검증📋 참조 대체품 (카탈로그에 없음)
PI3DPX1202A1ZBE-2019
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
PI3DPX1202A1ZBE-TR
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
PI3DPX1202A1ZBE 최대 정격 & 전기적 특성
| 기능 | Buffer / ReDriver |
| Number of Channels | 1 |
| Data Rate (per lane) | 5.4 Gbps (DisplayPort 1.2 HBR2) |
| Standard Supported | DisplayPort 1.2 |
| Auxiliary Channel | Integrated DDC/AUX switch |
| Input Type | Differential (DisplayPort main link) |
| 출력 유형 | Differential (DisplayPort main link) |
| 공급 전압 | 3.3 V typical |
| 패키지 | 48-TQFN V-QFN7070-48 (7x7 mm) with exposed pad |
| 실장 유형 | Surface Mount |
| RoHS 상태 | Compliant (per Diodes product page) |
| Lead-Free | Yes (ZBE suffix) |
| Packaging | Tray (per Mouser: 260 pcs/tray) |
| Equalization | Adaptive input equalizer |
| De-emphasis | Configurable transmit de-emphasis |
PI3DPX1202A1ZBE 핀 구성
| 핀 1 | IN_DP_P — DisplayPort main-link positive input |
| 핀 2 | IN_DP_N — DisplayPort main-link negative input |
| 핀 3 | VCC — 3.3 V supply |
| 핀 4 | GND — Ground |
| 핀 5 | OUT_DP_P — DisplayPort main-link positive output |
| 핀 6 | OUT_DP_N — DisplayPort main-link negative output |
| 핀 7 | AUX_P — DDC/AUX positive (after mux) |
| 핀 8 | AUX_N — DDC/AUX negative (after mux) |
| 핀 9 | EN — Enable (active high) |
| 핀 10 | SCL_SRC — DDC SCL source side |
| 핀 11 | SDA_SRC — DDC SDA source side |
| 핀 12 | SCL_SNK — DDC SCL sink side |
| 핀 13 | SDA_SNK — DDC SDA sink side |
| 핀 14 | AUX_SEL — AUX/DDC mux select |
| 핀 15 | HPD_IN — Hot-plug detect input from sink |
| 핀 16 | HPD_OUT — Hot-plug detect output to source |
| 핀 17 | CAD_SRC — Cable detect / AUX source-side control |
| 핀 18 | CAD_SNK — Cable detect / AUX sink-side control |
| 핀 19 | EQ_SEL0 — Equalizer setting bit 0 |
| 핀 20 | EQ_SEL1 — Equalizer setting bit 1 |
| 핀 21 | DE_SEL0 — De-emphasis setting bit 0 |
| 핀 22 | DE_SEL1 — De-emphasis setting bit 1 |
| 핀 23 | PRE_EMPH — Pre-emphasis control |
| 핀 24 | VCC_AUX — AUX/DDC supply rail |
| 핀 25 | AUX_VCC — AUX supply (alternate labeling per datasheet) |
| 핀 26 | AUX_CH_SEL — AUX channel source/sink select |
| 핀 27 | TERM_EN — Internal termination enable |
| 핀 28 | VCC_TX — TX supply rail |
| 핀 29 | TXBIAS — TX bias reference |
| 핀 30 | VCC_RX — RX supply rail |
| 핀 31 | RXBIAS — RX bias reference |
| 핀 32 | RES1 — Reserved / configuration pin |
| 핀 33 | RES2 — Reserved / configuration pin |
| 핀 34 | RES3 — Reserved / configuration pin |
| 핀 35 | TEST — Factory test pin (float or NC in application) |
| 핀 36 | NC1 — Not connected (per datasheet) |
| 핀 37 | NC2 — Not connected (per datasheet) |
| 핀 38 | NC3 — Not connected (per datasheet) |
| 핀 39 | NC4 — Not connected (per datasheet) |
| 핀 40 | GND2 — Ground |
| 핀 41 | GND3 — Ground |
| 핀 42 | GND4 — Ground |
| 핀 43 | GND5 — Ground |
| 핀 44 | GND6 — Ground |
| 핀 45 | GND7 — Ground |
| 핀 46 | GND8 — Ground |
| 핀 47 | GND9 — Ground |
| 핀 48 | EP — Exposed thermal pad - connect to ground plane |
일반적인 애플리케이션
PI3DPX1202A1ZBE 적합 용도: 6 애플리케이션s: Notebook Docking Station DisplayPort Output, DisplayPort Dongle and Adapter Cables, External Monitor DisplayPort Input Panel, Embedded Display Add-In Card, Video Capture Card DisplayPort Input, Industrial PC DisplayPort Sink Interface.
Notebook Docking Station DisplayPort Output
The PI3DPX1202A1ZBE compensates for PCB trace loss between the system DisplayPort TX and the docking connector in notebook docks. The integrated DDC/AUX switch lets the dock share a single DP connector between an upstream host GPU and a downstream monitor. At 5.4 Gbps HBR2 the adaptive equalizer restores eye opening over 6-12 inch dock-internal traces plus the mating connector, which otherwise clip the HBR2 eye below the VESA mask. Place the redriver within 4 inches of the docking connector and decouple VCC with a 10 uF bulk plus 0.1 uF and 0.01 uF ceramics; route the differential pairs at 100 ohm with 5 mil length match.
추천
DisplayPort Dongle and Adapter Cables
The PI3DPX1202A1ZBE is well matched to active DisplayPort-to-HDMI or DisplayPort-to-DP dongles that must extend a 5.4 Gbps link over a 1-2 m cable. The redriver recovers amplitude and rise time at the dongle input so the cable does not attenuate HBR2 below the DP 1.2 eye mask. Its integrated DDC/AUX mux eliminates an external AUX switch FET, shrinking the dongle BOM. Use 100 ohm differential routing with the exposed pad soldered to a generous ground pour for thermal relief; tie the EN pin through a 100 kohm pull-down so the dongle powers up cleanly when plugged in.
추천
External Monitor DisplayPort Input Panel
In an external monitor DisplayPort input board, the PI3DPX1202A1ZBE sits between the panel connector and the TCON, compensating for the input board routing plus the cable attenuation from the host PC. At HBR2 (5.4 Gbps) the redriver's adaptive equalizer enables a wide compatibility window across host graphics cards. The integrated DDC/AUX switch simplifies EDID read-back from the TCON to the host. Place the part near the panel connector, follow 100 ohm differential layout, and keep the AUX lines well isolated from the main-link pairs to minimize crosstalk.
추천
Embedded Display Add-In Card
The PI3DPX1202A1ZBE is suited to compact embedded display add-in cards where the host DisplayPort TX must reach an internal panel connector across a multi-layer PCB. The redriver's adaptive equalization and configurable de-emphasis hold the HBR2 eye open even when the loss budget is exceeded by long internal traces or flex cables. The 7x7 mm TQFN-48 footprint fits dense board layouts, and the exposed pad spreads heat efficiently for continuous HBR2 traffic. Decouple the 3.3 V supply locally and route the AUX channel away from switching power rails.
추천
Video Capture Card DisplayPort Input
The PI3DPX1202A1ZBE conditions the DisplayPort input of a video capture card before the FPGA or capture SoC, preserving HBR2 eye quality across the front-panel connector and input trace. The integrated DDC/AUX switch routes EDID read-back and HDCP AUX transactions to the capture SoC without an external mux. The part's low standby current supports hot-plug detect without draining the host bus power. Place the redriver within 1 inch of the connector and tightly match the differential pair lengths; route AUX/DDC over a quiet ground-referenced layer.
추천
Industrial PC DisplayPort Sink Interface
The PI3DPX1202A1ZBE serves as the DisplayPort 1.2 redriver on industrial PC sink boards where long internal cabling between chassis panels and the mainboard exceeds the native HBR2 loss budget. The redriver restores signal integrity and the integrated DDC/AUX switch handles EDID and HDCP auxiliary transactions. The TQFN-48 7x7 mm package with exposed pad simplifies thermal design in sealed industrial enclosures. Decouple VCC robustly and keep AUX traces short to meet DisplayPort 1.2 AUX channel rise-time limits in noisy industrial environments.
추천
추천 제품 요약
엔지니어링 참조 데이터: PI3DPX1202A1ZBE — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | PI3DPX1202A1 | PI3DPX1203A1ZBE | PI3DPX1202A1ZBE-2019 | PI3DPX1202A1ZBE-TR |
|---|---|---|---|---|---|
| Package | 48-TQFN (V-QFN7070-48, 7x7 mm) | 48-TQFN (V-QFN7070-48) - same | 48-TQFN (V-QFN7070-48) - same | 48-TQFN (V-QFN7070-48) - same | 48-TQFN (V-QFN7070-48) - same |
| Brand | Diodes Incorporated | Diodes Incorporated | Diodes Incorporated | Diodes Incorporated | Diodes Incorporated |
| Data Rate | 5.4 Gbps (HBR2) | 5.4 Gbps (HBR2) - same | 5.4 Gbps (HBR2) - same | 5.4 Gbps (HBR2) - same | 5.4 Gbps (HBR2) - same |
| Number of Channels | 1 main-link channel | 1 main-link channel | Multiple main-link lanes | 1 main-link channel | 1 main-link channel |
| Integrated DDC/AUX Switch | Yes | Yes | Yes (per family datasheet) | Yes | Yes |
| Supply Voltage | 3.3 V | 3.3 V | 3.3 V | 3.3 V | 3.3 V |
| Adaptive Equalization | Yes | Yes | Yes | Yes | Yes |
| De-emphasis | Configurable | Configurable | Configurable | Configurable | Configurable |
주요 차별점
- Integrated DDC/AUX switch eliminates external AUX mux (vs Generic DisplayPort redriver without AUX mux)
- Adaptive input equalization at 5.4 Gbps HBR2 (vs Fixed-equalization redrivers)
- Single-channel 48-TQFN footprint simplifies routing (vs Multi-lane DisplayPort redrivers in larger packages)
설계 노트
Route the high-speed DisplayPort main-link pairs (IN_DP_P/N and OUT_DP_P/N) as 100 ohm differential microstrip or stripline with intra-pair length matching within 5 mils. Keep the redriver within 4 inches of the DisplayPort connector and within 2 inches of the source-side GPU/SoC TX. Use a solid ground reference plane directly beneath the pairs and avoid crossing any switching power node above them; a 6-mil gap between adjacent pairs is sufficient for -35 dB crosstalk at 5.4 Gbps.
Decouple VCC, VCC_AUX, VCC_TX, and VCC_RX individually with a 10 uF X5R bulk capacitor plus 0.1 uF and 0.01 uF high-frequency ceramics placed within 50 mils of each supply pin. Star-route each supply pin back to the bulk capacitor before joining the main 3.3 V plane. Tie the exposed thermal pad to a ground pour of at least 100 mm^2 to keep junction temperature within margin during continuous HBR2 traffic; the part consumes approximately 200-300 mW in active operation.
Do not skip the AUX/DDC isolation resistors between the redriver and the connector - the hot-plug-detect (HPD) and AUX lines carry bidirectional 3.3 V tolerant signaling that can latch up if the source/sink grounds differ. Also, ensure EQ_SEL0/EQ_SEL1 and DE_SEL0/DE_SEL1 are tied to known logic levels (do not float) - floating straps may cause the redriver to enter an undefined equalization state and degrade the HBR2 eye. Finally, respect the AUX_CH_SEL state during power-up so the AUX channel defaults to the source side for clean EDID read-back.
규정 준수 정보
RoHS compliance and lead-free (ZBE suffix) per Diodes product page. Operating temperature range, MSL rating, halogen-free, REACH, and conflict-mineral status not stated in the verified web data excerpts and are marked unknown per Data Authenticity Rule 2. AEC-Q100 not applicable for a commercial-grade interface redriver.
