EP1S20F672C6 vs EP1S20F672C7 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1S20F672C6 disebabkan oleh Altera dan EP1S20F672C7 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EP1S20F672C7 - Stratix FPGA 18,460 LEs 672-BGA | Intel
EP1S20F672C7 ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EP1S20F672C6 | EP1S20F672C7 |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Masa Terakhir Dibeli |
| Manufacturer | Altera (now Intel) | — |
| Series | Stratix | Stratix |
| Family | Stratix (first generation) | Altera Stratix FPGA |
| Process Technology | 0.13 µm CMOS | — |
| Logic Elements (LEs) | 18,460 | 18,460 |
| Logic Array Blocks (LABs) | 1,846 | — |
| Embedded Memory Bits | 1,669,248 | 1,669,248 |
| Maximum User I/Os | 426 | — |
| Kemasan | 672-ball FineLine BGA | 672-ball FineLine BGA (35 x 35 mm, 1.27 mm pitch) |
| Package Code | F672 | — |
| Speed Grade | C6 | C7 |
| Suhu Operasi | 0°C to +85°C (Commercial) | 0C to 85C (commercial) |
| Tegangan Pemberi Arus | Core 1.5 V, I/O programmable | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Status RoHS | [DATA_NEEDED: RoHS compliance status] | unknown |
| User I/O Pins | — | 426 |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Logic Family | — | CMOS, SRAM-based |
| Core Supply Voltage | — | 1.5 V |
| Configuration Modes | — | JTAG, Passive Serial, Fast Passive Parallel, Active Serial |
| Aras MSL | — | [DATA_NEEDED: MSL level] |
| Clock PLLs | — | Up to 10 |