EP1S20F672I7 vs EP1S20B672C7N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1S20F672I7 disebabkan oleh Intel dan EP1S20B672C7N disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EP1S20F672I7 - Stratix FPGA, 18,460 LEs, 672-BGA | Intel / Altera
EP1S20F672I7 ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EP1S20F672I7 | EP1S20B672C7N |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Masa Terakhir Dibeli | Obsolete |
| Family | Stratix (first generation) | Stratix (original) |
| Logic Elements (LEs) | 18,460 | 18,460 |
| Maximum RAM Bits | 1,669,248 | — |
| DSP Blocks | [DATA_NEEDED: exact DSP block count] | — |
| Maximum User I/Os | 426 | — |
| Supply Voltage (VCCINT core) | 1.5 V | — |
| Logic Family | CMOS | CMOS |
| Kemasan | 672-BBGA (FineLine BGA), 35 x 35 mm, 1.27 mm pitch | — |
| Suhu Operasi | -40C to +85C (industrial grade, I7 suffix) | 0 °C to 85 °C (Commercial Extended) |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | — |
| Number of Pins / Balls | 672 | 672 |
| Jenis Pemasangan | Surface Mount (BGA) | Surface Mount (BGA) |
| Clock Management PLLs | [DATA_NEEDED: PLL count] | — |
| Status RoHS | unknown | [DATA_NEEDED: RoHS compliance] |
| Lead-Free / Finish | SnPb (e0 per Partstack datasheet extract) | — |
| Aras MSL | unknown | 3 (per JEDEC J-STD-020) |
| Status | Last Time Buy (per distributor notices) | — |
| Series | — | Stratix |
| Process Technology | — | 0.13 µm CMOS |
| LABs / CLBs | — | 1,846 |
| Embedded Memory Bits | — | 1,669,248 bits |
| Maximum User I/O | — | 426 |
| Package Type | — | 672-BBGA (Fine-pitch BGA, 35 × 35 mm, 1.27 mm pitch) |
| Supply Voltage (Core, VCCINT) | — | 1.5 V |
| Speed Grade | — | -7 |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |