EP1S20F672I7 vs EP1S20B672C7N 比較
詳細並排比較 EP1S20F672I7 由 Intel 與 EP1S20B672C7N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S20F672I7 | EP1S20B672C7N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Family | Stratix (first generation) | Stratix (original) |
| Logic Elements (LEs) | 18,460 | 18,460 |
| Maximum RAM Bits | 1,669,248 | — |
| DSP Blocks | [DATA_NEEDED: exact DSP block count] | — |
| Maximum User I/Os | 426 | — |
| Supply Voltage (VCCINT core) | 1.5 V | — |
| Logic Family | CMOS | CMOS |
| 封裝 | 672-BBGA (FineLine BGA), 35 x 35 mm, 1.27 mm pitch | — |
| 工作溫度 | -40C to +85C (industrial grade, I7 suffix) | 0 °C to 85 °C (Commercial Extended) |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | — |
| Number of Pins / Balls | 672 | 672 |
| 安裝類型 | Surface Mount (BGA) | Surface Mount (BGA) |
| Clock Management PLLs | [DATA_NEEDED: PLL count] | — |
| RoHS 狀態 | unknown | [DATA_NEEDED: RoHS compliance] |
| Lead-Free / Finish | SnPb (e0 per Partstack datasheet extract) | — |
| MSL 等級 | unknown | 3 (per JEDEC J-STD-020) |
| Status | Last Time Buy (per distributor notices) | — |
| Series | — | Stratix |
| Process Technology | — | 0.13 µm CMOS |
| LABs / CLBs | — | 1,846 |
| Embedded Memory Bits | — | 1,669,248 bits |
| Maximum User I/O | — | 426 |
| Package Type | — | 672-BBGA (Fine-pitch BGA, 35 × 35 mm, 1.27 mm pitch) |
| Supply Voltage (Core, VCCINT) | — | 1.5 V |
| Speed Grade | — | -7 |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |