EP1S20F672I7 vs EP1S20B672C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S20F672I7 sa pamamagitan ng Intel at EP1S20B672C7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP1S20F672I7 - Stratix FPGA, 18,460 LEs, 672-BGA | Intel / Altera
EP1S20F672I7 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP1S20F672I7 | EP1S20B672C7N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | Stratix (first generation) | Stratix (original) |
| Logic Elements (LEs) | 18,460 | 18,460 |
| Maximum RAM Bits | 1,669,248 | — |
| DSP Blocks | [DATA_NEEDED: exact DSP block count] | — |
| Maximum User I/Os | 426 | — |
| Supply Voltage (VCCINT core) | 1.5 V | — |
| Logic Family | CMOS | CMOS |
| Packhaging | 672-BBGA (FineLine BGA), 35 x 35 mm, 1.27 mm pitch | — |
| Temperature na Operasyon | -40C to +85C (industrial grade, I7 suffix) | 0 °C to 85 °C (Commercial Extended) |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | — |
| Number of Pins / Balls | 672 | 672 |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Clock Management PLLs | [DATA_NEEDED: PLL count] | — |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS compliance] |
| Lead-Free / Finish | SnPb (e0 per Partstack datasheet extract) | — |
| Level ng MSL | unknown | 3 (per JEDEC J-STD-020) |
| Status | Last Time Buy (per distributor notices) | — |
| Series | — | Stratix |
| Process Technology | — | 0.13 µm CMOS |
| LABs / CLBs | — | 1,846 |
| Embedded Memory Bits | — | 1,669,248 bits |
| Maximum User I/O | — | 426 |
| Package Type | — | 672-BBGA (Fine-pitch BGA, 35 × 35 mm, 1.27 mm pitch) |
| Supply Voltage (Core, VCCINT) | — | 1.5 V |
| Speed Grade | — | -7 |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |