EP20K400GI655-3V vs EP20K400GI655-1V Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K400GI655-3V disebabkan oleh Intel dan EP20K400GI655-1V disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EP20K400GI655-3V - APEX 20K 400K-Gate FPGA, 16K LE, 655-Pin PGA | Altera (Intel)
EP20K400GI655-3V ObsoleteIntel
EP20K400GI655-1V - APEX 20K 400K Gate FPGA, 655-pin CBGA | Intel
EP20K400GI655-1V ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EP20K400GI655-3V | EP20K400GI655-1V |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Masa Terakhir Dibeli |
| Series | APEX 20K | — |
| Device Family | EP20K400 | — |
| Logic Elements | 16,640 | 16,640 |
| Typical Gate Count | 400,000 gates | — |
| Maximum User I/O | 496 | 502 |
| Dedicated Inputs | 6 | 4 |
| Embedded System Blocks (ESBs) | [DATA_NEEDED: ESB count] | — |
| Total Embedded RAM | [DATA_NEEDED: total RAM bits] | — |
| Technology | CMOS (0.18 µm process) | — |
| Maximum Internal Clock Frequency | 714.2 MHz | — |
| Supply Voltage VCCINT | 2.5 V | — |
| I/O Supply Voltage VCCIO | 2.5 V or 3.3 V | — |
| Kemasan | 655-pin SPGA (Staggered PGA), 47 x 47 mm | — |
| Jenis Pemasangan | Through-Hole (Pin Grid Array) | — |
| Suhu Operasi | -40 °C to +85 °C (industrial) | [DATA_NEEDED: industrial vs military grade] |
| Tingkat sensitiviti Air Nama (MSL) | 1 | — |
| Qualification | Not Qualified | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED] |
| Configuration Interface | IEEE 1149.1 JTAG + serial / parallel passive | — |
| Family | — | APEX 20K |
| Typical Gates | — | 400,000 |
| Package Type | — | CBGA-655 (Ceramic Ball Grid Array) |
| Package Code (JESD-30) | — | S-CPGA-P655 |
| Package Equivalence Code | — | SPGA655, 47x47 |
| Process Technology | — | CMOS |
| Propagation Delay | — | 2.5 ns |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 2.5 V / 3.3 V |
| Configuration | — | In-system programmable via JTAG |
| Boundary Scan | — | IEEE 1149.1 JTAG |
| Aras MSL | — | 1 |
| Package Body Material | — | Ceramic |