EP20K400GI655-3V vs EP20K400GI655-1V 比較

詳細並排比較 EP20K400GI655-3V 由 Intel 與 EP20K400GI655-1V 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EP20K400GI655-1V EP20K400GI655-1V - APEX 20K 400K Gate FPGA, 655-pin CBGA | Intel

EP20K400GI655-1V - APEX 20K 400K Gate FPGA, 655-pin CBGA | Intel

EP20K400GI655-1V ⚠ 最後購買機會

規格比較

參數 EP20K400GI655-3V EP20K400GI655-1V
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 最後購買
Series APEX 20K —
Device Family EP20K400 —
Logic Elements 16,640 16,640
Typical Gate Count 400,000 gates —
Maximum User I/O 496 502
Dedicated Inputs 6 4
Embedded System Blocks (ESBs) [DATA_NEEDED: ESB count] —
Total Embedded RAM [DATA_NEEDED: total RAM bits] —
Technology CMOS (0.18 µm process) —
Maximum Internal Clock Frequency 714.2 MHz —
Supply Voltage VCCINT 2.5 V —
I/O Supply Voltage VCCIO 2.5 V or 3.3 V —
封裝 655-pin SPGA (Staggered PGA), 47 x 47 mm —
安裝類型 Through-Hole (Pin Grid Array) —
工作溫度 -40 °C to +85 °C (industrial) [DATA_NEEDED: industrial vs military grade]
濕度敏感等級 (MSL) 1 —
Qualification Not Qualified —
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED]
Configuration Interface IEEE 1149.1 JTAG + serial / parallel passive —
Family — APEX 20K
Typical Gates — 400,000
Package Type — CBGA-655 (Ceramic Ball Grid Array)
Package Code (JESD-30) — S-CPGA-P655
Package Equivalence Code — SPGA655, 47x47
Process Technology — CMOS
Propagation Delay — 2.5 ns
Core Supply Voltage — 2.5 V
I/O Supply Voltage — 2.5 V / 3.3 V
Configuration — In-system programmable via JTAG
Boundary Scan — IEEE 1149.1 JTAG
MSL 等級 — 1
Package Body Material — Ceramic

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