EP20K600CF672C8N vs EP20K600CF672C6 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K600CF672C8N disebabkan oleh Intel dan EP20K600CF672C6 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EP20K600CF672C8N | EP20K600CF672C6 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Obsolete |
| Device Type | SPLD | — |
| Product Type | FPGA / programmable logic device | — |
| Family | APEX 20KC | APEX 20KC |
| Nominal Gate Capacity | 600K gates | — |
| Logic Elements or Cells | 24,320 | — |
| Macros | 2,432 | — |
| User I/O Count | 508 | — |
| Package Terminals | 652 pins | — |
| Kemasan | BGA-652, 45 x 45 mm, 1.27 mm pitch | 672-ball FineLine BGA (CF672) |
| Package Description | 672-pin FC-FBGA | — |
| Tegangan Pemberi Arus | 1.8 V | — |
| Listed Frequency | 301.21 MHz | — |
| Propagation Delay | 1.48 ns | — |
| Fabrication Process | 0.15 µm | — |
| Suhu Operasi | 0°C to 85°C | 0 °C to +85 °C (commercial) |
| Interconnect Metal | All-layer copper metal | — |
| I/O Configuration | 508 user I/O | — |
| Jenis Pemasangan | Surface mount | — |
| Status RoHS | unknown | Non-RoHS (legacy process) |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Configuration Method | [DATA_NEEDED: configuration memory and programming method] | SRAM-based, JTAG, EPC16/EPC2 |
| Core Current | [DATA_NEEDED: core supply current] | — |
| I/O Bank Voltage | [DATA_NEEDED: supported I/O voltage range] | — |
| Junction Temperature | [DATA_NEEDED: maximum junction temperature] | — |
| Tegangan Panas | [DATA_NEEDED: junction-to-ambient thermal resistance] | — |
| Typical Gate Count | — | 600,000 gates |
| Logic Elements (LEs) | — | 24,320 |
| Embedded System Blocks (ESBs) | — | 160 (each 2,048 bits) |
| Maximum Embedded RAM | — | 311,296 bits (311 kbit) |
| Maximum User I/O Pins | — | 508 |
| Package Body Size | — | 27 mm × 27 mm |
| Speed Grade | — | -6 (C6) |
| Core Voltage | — | 1.8 V |
| I/O Standards Supported | — | LVCMOS, LVTTL, HSTL, SSTL, GTL+ |
| Embedded PLLs | — | 4 |
| Process Technology | — | 0.18 µm CMOS, 6 metal layers |