EP610ILC-10 vs EP610DC-30 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP610ILC-10 disebabkan oleh Altera dan EP610DC-30 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP610ILC-10 EP610DC-30
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete NRND
Device Family Classic EPLD —
Product Type UV-Erasable / OTP PLD Classic EPLD (Erasable Programmable Logic Device)
Architecture PAL-type with macrocells —
Macrocells 16 16
Usable Gates 300 300
Product Terms 160 —
I/O Pins 16 16 (with output enable)
Dedicated Inputs 4 16
Tegangan Pemberi Arus 5 V (single supply) —
Pin-to-Pin Delay (tPD) 10 ns (grade -10) —
Counter Frequency (fCNT) 100 MHz —
Logic Family Compatibility TTL (5 V CMOS/TTL-compatible I/O) —
Kemasan PLCC-28 (plastic J-lead chip carrier) 24-pin CERDIP (windowed)
Jenis Pemasangan Surface Mount (PLCC socket or solder) Through-Hole
Suhu Operasi [DATA_NEEDED: operating temperature range] Commercial (0C to +70C)
Status RoHS [DATA_NEEDED: RoHS compliance] —
Family — EP610 (Classic Device Family)
Logic Expanders — 4 (4 product terms per macrocell)
Maximum Pipelined Clock Frequency — 100 MHz
Propagation Delay (tPD) — 30 ns
Speed Grade — -30 (30 ns tPD)
Technology — CMOS EPROM
Programmability — UV-erasable, windowed EPROM
Security Bit — Yes (protects design after programming)
Output Modes — Registered and Combinatorial

Laporan Datasheet & Sumber

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