EP610PC-15 vs EP910PC-15 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP610PC-15 disebabkan oleh Altera dan EP910PC-15 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP610PC-15 EP910PC-15
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Family Classic EPLD Altera Classic EPLD
Device Type EPLD (Erasable Programmable Logic Device) —
Usable Gates 300 gates 900
Macrocells 16 24
Logic Delay (tPD) 15 ns (pin-to-pin, -15 speed grade) —
Maximum Counter Frequency 100 MHz (per family datasheet) —
Pipelined Data Rate Up to 100 MHz —
Supply Voltage (VCC) 5 V (single supply) 4.75 V to 5.25 V (5 V nominal)
Technology CMOS —
Architecture PAL-type, sum-of-products AND/OR array —
TTL Emulation 100% TTL compatible —
Kemasan PDIP-24 (plastic DIP, 24-pin) 24-pin PDIP (PDIP-24, 0.300 inch)
Kiraan Pin 24 pins —
Suhu Operasi [DATA_NEEDED: operating temperature range] 0C to +70C (commercial)
Jenis Pemasangan Through-Hole (DIP) Through-Hole
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS]
Development Tool Altera MAX+PLUS II —
Logic Test Circuitry On-board for AC/DC verification —
Maximum Pin-to-Pin Delay (tpd) — 15 ns
Counter Frequency (fCNT) — 100 MHz
Supply Current (Icc) — 80 mA typical
Dedicated Inputs — 10
Dedicated I/O Pins — 12
Process Technology — CMOS, UV-erasable
Programming Method — Altera Logic Programmer card
Aras MSL — Not applicable (through-hole)

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