EP910DM-40 vs EP910ILC-25 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910DM-40 disebabkan oleh Altera dan EP910ILC-25 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EP910DM-40 | EP910ILC-25 |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Product Type | UV Erasable Programmable Logic Device (EPLD) | — |
| Family | Altera Classic EP910 | EP910 Classic EPLD |
| Architecture | PAL-type AND/OR with global programmable interconnect bus | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 36 | — |
| Dedicated Outputs | 24 | — |
| Bidirectional I/O Lines | 24 | — |
| Product Terms | 240 | — |
| Propagation Delay (tPD) | 40 ns | 25 ns |
| External Clocks | 2 | — |
| Process Technology | CMOS | — |
| Kemasan | 40-pin Ceramic DIP (Cerdip) with UV window | 44-pin JLCC (windowed ceramic) |
| Jenis Pemasangan | Through-Hole (DIP) | Surface Mount |
| Suhu Operasi | [DATA_NEEDED: operating temperature range] | -40C to +85C (industrial) |
| Tegangan Pemberi Arus | 5 V | 5 V |
| Status RoHS | [DATA_NEEDED: RoHS compliance status] | non_compliant (ceramic windowed package) |
| Programming Interface | JEDEC-standard fuse-map / UV erasure | — |
| User I/O Pins | — | 36 |
| Internal Frequency (fMAX) | — | [DATA_NEEDED: fMAX rating] |
| Logic Blocks | — | Sum-of-products AND/OR array |
| Technology | — | CMOS EPROM (UV-erasable) |
| Configuration Memory | — | Non-volatile EPROM (windowed ceramic) |
| Development Tool | — | Altera MAX+PLUS II (legacy) |
| Status Lingkungan Hidup | — | Obsolete - last time buy was late 1990s |