EP910PC-35 vs EP910PC30T Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910PC-35 disebabkan oleh Altera dan EP910PC30T disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP910PC-35 EP910PC30T
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family Classic EPLD Altera Classic EPLD
Device Type EPLD (Erasable Programmable Logic Device) —
Macrocells 24 —
I/O Pins 24 —
Dedicated Inputs 12 —
Total Inputs 36 —
Product Terms 240 —
Propagation Delay (tPD) 35 ns 30 ns
Maximum Counter Frequency 37 MHz —
Internal Performance Frequency 100 MHz —
Technology CMOS, UV-erasable/OTP —
Tegangan Pemberi Arus 5 V —
Suhu Operasi [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
Kemasan 40-pin PDIP (Plastic DIP) 24-pin PDIP (PC)
Jenis Pemasangan Through-Hole Through-Hole (THT)
Architecture PAL-type sum-of-products, AND/OR array —
Programming Method UV-erase (ceramic) / OTP (plastic), A+PLUS / MAX+PLUS tools —
Compliance / RoHS [DATA_NEEDED: RoHS status - legacy part] —
Device Series — EP910
Number of Macrocells — 24
Number of I/O Pins — 24
Number of Dedicated Inputs — 12
Maximum Product Terms — 240
Maximum Clock Frequency (fMAX) — 33.3 MHz
Supply Voltage (VCC) — 5 V (4.75 V to 5.25 V)
Process Technology — CMOS
Programmable Logic Architecture — PAL-type sum-of-products, EPLD
Speed Grade — -30 (30 ns tPD)
Programming Technology — EPROM (OTP in plastic package, UV-erasable in windowed package)
Status RoHS — [DATA_NEEDED: RoHS compliance status]
Kiraan Pin — 24

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