EPC16QC100-TAAC80 vs EPC16QC100II Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC16QC100-TAAC80 disebabkan oleh Altera dan EPC16QC100II disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPC16QC100-TAAC80 EPC16QC100II
Merek Altera Altera
Kategori Memory ICs Memory ICs
Status Lingkungan Hidup Obsolete NRND
Jenis Ingatan Flash (non-volatile configuration) FPGA Configuration PROM (Flash-based)
Memory Density 16 Mbit 16 Mbit
Configuration Modes FPP, PS, AS, JTAG —
Data Compression Yes (built-in, 30-55% file size reduction) —
Supply Voltage (VCC) 3.3 V —
I/O Voltage Tolerance 1.8 V / 2.5 V / 3.3 V / 5 V —
Supported FPGA Families Stratix, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, FLEX 8000, Cyclone
JTAG Support IEEE 1149.1 boundary scan, in-system programmable —
Kemasan 100-pin PQFP (Plastic Quad Flat Pack), 20x14 mm 100-pin PQFP (Plastic Quad Flat Pack)
Package Code QC100 —
Packaging Style Tape and Reel (TAAC80 suffix) —
Suhu Operasi -40C to +85C (industrial) -40C to +85C (Industrial)
Configuration Controller Internal (integrated with flash array) —
Kiraan Pin 100 —
Jenis Pemasangan Surface Mount —
Configuration Mode — FPP / PSA (Fast Passive Parallel / Passive Serial Asynchronous)
Programmability — In-System Programmable via IEEE 1149.1 (JTAG)
Cascade Support — Yes (multi-PROM cascading supported)
Core Supply Voltage — 3.3 V
I/O Tolerance — 5 V tolerant configuration pins
Package Dimensions — 20 mm x 14 mm, 0.5 mm pitch
Lead Finish — Matte Tin (lead-free)
Aras MSL — 3 (per JEDEC J-STD-020)
Status RoHS — Compliant
Configuration Pins — DCLK, DATA[0..n], nCONFIG, nSTATUS, CONF_DONE, OE
Compression Support — Yes (reduces on-PROM footprint vs uncompressed bitstream)

Laporan Datasheet & Sumber

Lihat Semua Produk Buat BOQ Minta Bao Harga