EPC2C20 vs EPC2-TC32 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC2C20 disebabkan oleh Altera dan EPC2-TC32 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EPC2-TC32 - 1.6Mb ISP Configuration PROM | Altera | TQFP-32
EPC2-TC32 ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EPC2C20 | EPC2-TC32 |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | Memory ICs |
| Status Lingkungan Hidup | Aktif | Masa Terakhir Dibeli |
| Manufacturer | Altera | — |
| MPN | EPC2C20 | — |
| Device Type | Configuration device integrated circuit | — |
| Primary Function | Configuration of SRAM-based lookup-table devices | — |
| Configuration Architecture | Single-device configuration solution | — |
| Architecture Block 1 | Configuration controller | — |
| Architecture Block 2 | Flash memory | — |
| Memory Technology | Flash memory | — |
| Supported Device Class | SRAM-based LUT devices | — |
| Configuration Mode | [DATA_NEEDED: configuration mode] | Serial (FPP/MSD via FPGA master/slave) |
| Memory Density | [DATA_NEEDED: memory density] | — |
| Configuration Data Interface | [DATA_NEEDED: configuration data interface] | — |
| Operating Voltage | [DATA_NEEDED: operating voltage] | — |
| Configuration Clock Frequency | [DATA_NEEDED: configuration clock frequency] | — |
| Kemasan | [DATA_NEEDED: package] | 32-pin TQFP (7x7 mm) |
| Kiraan Pin | [DATA_NEEDED: pin count] | — |
| Gambaran Suhu Operasi | [DATA_NEEDED: operating temperature range] | 0C to +70C (Commercial) |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - datasheet does not specify in retrieved snippet] |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Jenis Ingatan | — | EPROM (OTP/UV-erasable configuration PROM) |
| Saiz Ingatan | — | 1.6 Mbit |
| Jenis Antaramuka | — | Serial |
| Organisasi | — | Serial bitstream output |
| Programmability | — | In-System Programmable (ISP) via JTAG (IEEE 1149.1) |
| Tegangan Pemberi Arus | — | 3.3 V |
| Jenis Pemasangan | — | Surface Mount |
| Supported FPGA Families | — | Stratix I/II, Cyclone I/II, APEX 20K/II, Mercury, ACEX 1K, FLEX 10K |
| Output Control | — | OE and nCS gating internal tri-state buffer |
| Internal Oscillator | — | Yes (drives address counter) |
| Aras MSL | — | MSL 3 (168 hours) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |