EPC2C20 vs EPC2-TC32 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC2C20 sa pamamagitan ng Altera at EPC2-TC32 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPC2C20 | EPC2-TC32 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | Memory ICs |
| Katayuan ng Lifecycle | Aktibo | Huling Pagbili |
| Manufacturer | Altera | — |
| MPN | EPC2C20 | — |
| Device Type | Configuration device integrated circuit | — |
| Primary Function | Configuration of SRAM-based lookup-table devices | — |
| Configuration Architecture | Single-device configuration solution | — |
| Architecture Block 1 | Configuration controller | — |
| Architecture Block 2 | Flash memory | — |
| Memory Technology | Flash memory | — |
| Supported Device Class | SRAM-based LUT devices | — |
| Configuration Mode | [DATA_NEEDED: configuration mode] | Serial (FPP/MSD via FPGA master/slave) |
| Memory Density | [DATA_NEEDED: memory density] | — |
| Configuration Data Interface | [DATA_NEEDED: configuration data interface] | — |
| Operating Voltage | [DATA_NEEDED: operating voltage] | — |
| Configuration Clock Frequency | [DATA_NEEDED: configuration clock frequency] | — |
| Packhaging | [DATA_NEEDED: package] | 32-pin TQFP (7x7 mm) |
| Bilang ng Pin | [DATA_NEEDED: pin count] | — |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | 0C to +70C (Commercial) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - datasheet does not specify in retrieved snippet] |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Uri ng Memory | — | EPROM (OTP/UV-erasable configuration PROM) |
| Laki ng Memory | — | 1.6 Mbit |
| Uri ng Interface | — | Serial |
| Organisasyon | — | Serial bitstream output |
| Programmability | — | In-System Programmable (ISP) via JTAG (IEEE 1149.1) |
| Volte ng Pagbibigay | — | 3.3 V |
| Uri ng Pagpapasok | — | Surface Mount |
| Supported FPGA Families | — | Stratix I/II, Cyclone I/II, APEX 20K/II, Mercury, ACEX 1K, FLEX 10K |
| Output Control | — | OE and nCS gating internal tri-state buffer |
| Internal Oscillator | — | Yes (drives address counter) |
| Level ng MSL | — | MSL 3 (168 hours) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |