EPC2CC20N vs EPC21LC20 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC2CC20N disebabkan oleh Altera dan EPC21LC20 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPC2CC20N EPC21LC20
Merek Altera Intel
Kategori FPGA & CPLD Memory ICs
Status Lingkungan Hidup NRND Aktif
Fungsi Configuration device for SRAM-based LUT FPGAs —
Density [DATA_NEEDED: bitstream density in bits] 2 Mb (2,097,152 bits)
Kemasan PLCC-20 —
Configuration Interface 16-bit parallel (FPP) / Passive Serial (PS) —
Supply Voltage (VCC) 3.3 V —
Programming Interface JTAG (IEEE 1149.1) via ByteBlasterMV / USB-Blaster IEEE 1149.1 (JTAG)
In-System Programmable Yes —
Error Detection 16-bit CRC on configuration frames —
Configuration Modes Supported FPP and PS (depends on host FPGA) —
Cascadable Yes (multiple EPC2 devices for larger bitstreams) —
Open-Drain Status Pin Yes (CONF_DONE / nSTATUS compatible) —
Suhu Operasi [DATA_NEEDED: industrial/commercial temp range] —
Jenis Pemasangan Surface Mount (PLCC-20 socket compatible) Surface Mount (PLCC socket or solder)
Aras MSL [DATA_NEEDED: MSL rating] [DATA_NEEDED: confirm moisture sensitivity level]
Status RoHS [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: confirm from Altera product page]
Jenis Ingatan — Serial Configuration PROM (Flash-based, in-system programmable)
Configuration Mode Supported — Serial (PS) for Altera SRAM-based LUT FPGAs
Maximum DCLK Frequency — 10 MHz
Access Time — approximately 35 ns [DATA_NEEDED: confirm exact datasheet figure]
Program/Erase Endurance — 100 cycles minimum [DATA_NEEDED: confirm from datasheet]
Operating Voltage (VCC) — 3.0 V to 3.6 V (3.3 V typical)
Standby Current — [DATA_NEEDED: ICCSB value]
Active Read Current — [DATA_NEEDED: ICC active current]
Operating Temperature (commercial) — 0 °C to +70 °C (LC suffix)
Operating Temperature (industrial) — [DATA_NEEDED: -40 to +85 °C for LI variant]
Kemasan / Case — 20-pin PLCC (J-lead, JEDEC MS-018)
Lead-Free (Pb-free) — [DATA_NEEDED: confirm]
Compatible FPGA Families — ACEX, APEX, Cyclone, FLEX, Mercury, Stratix (SRAM-based LUT)
JTAG Boundary-Scan Compliant — Yes (IEEE Std 1149.1)
Data Width — 1 bit (serial DATA output)

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