EPF10K200EFC672-3 vs EPF10K200SFI672-2N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPF10K200EFC672-3 disebabkan oleh Intel dan EPF10K200SFI672-2N disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EPF10K200EFC672-3 - FLEX 10KE FPGA 9984 Cells 470 I/O BGA-672 | Intel
EPF10K200EFC672-3 ObsoletePengandingan Spesifikasi
| Parametr | EPF10K200EFC672-3 | EPF10K200SFI672-2N |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Series | FLEX 10KE | — |
| Number of Logic Elements / Cells | 9,984 | — |
| Number of LABs / CLBs | 1248 | — |
| Total RAM Bits | 98,304 bits (12 EABs of 8 Kbits) | — |
| Number of I/O | 470 | — |
| Number of Gates (typical) | 200,000 | — |
| Supply Voltage - Operating | 2.3 V to 2.7 V (2.5 V nominal) | — |
| Process Technology | 0.22 µm CMOS | 0.22 um CMOS |
| Maximum Operating Frequency | 166.67 MHz | — |
| Propagation Delay | 0.4 ns | — |
| Kemasan / Case | 672-BBGA (27 x 27 mm, 1.0 mm pitch, FineLine BGA) | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Suhu Operasi | 0 °C to +70 °C (commercial) | — |
| Configuration Memory | SRAM-based (volatile, requires external configuration device) | — |
| Number of PLLs | 4 | — |
| Status RoHS | [DATA_NEEDED: rohs status] | Lead-free (N suffix) |
| Aras MSL | [DATA_NEEDED: MSL level] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Family | — | FLEX 10KE |
| Device Logic Elements | — | 9,984 |
| Typical Gates | — | 200,000 |
| Maximum System Gates | — | [DATA_NEEDED: maximum system gates] |
| Embedded Memory (EAB) | — | 12 EABs, 98,304 bits total |
| User I/Os | — | 470 |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 3.3 V (5.0 V tolerant) |
| Operating Temperature Grade | — | Industrial (-40C to +85C) |
| Speed Grade | — | -2 (mid) |
| Kemasan | — | 672-ball FBGA (FineLine BGA), 27 x 27 mm, 1.0 mm pitch |
| JTAG Boundary-Scan | — | IEEE Std. 1149.1 compliant |
| Configuration Method | — | SRAM-based (requires external boot ROM) |