EPM5128LC2 vs EPM5128JC Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5128LC2 disebabkan oleh Altera dan EPM5128JC disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Altera
EPM5128LC2 EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera

EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera

EPM5128LC2 ⚠ Bahagian terakhir untuk beli

Pengandingan Spesifikasi

Parametr EPM5128LC2 EPM5128JC
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Masa Terakhir Dibeli Obsolete
Family MAX 5000 —
Device Type CPLD (Complex Programmable Logic Device) EPLD / CPLD
Macrocells 128 —
Logic Array Blocks (LABs) 8 —
Interconnect Programmable Interconnect Array (PIA) —
Global Clock Inputs 1 dedicated —
Propagation Delay (tPD) 45 ns 35 ns
Supply Voltage (VCC) 5 V 5 V (typical)
Process Technology CMOS EPROM CMOS EPROM
Configuration Memory On-chip EPROM (non-volatile) UV-erasable EPROM (windowed package)
Boundary Scan JTAG / IEEE 1149.1 JTAG IEEE 1149.1 (family feature)
Suhu Operasi -40 C to +85 C (extended commercial) Commercial 0C to +70C
Kemasan PGA (Pin Grid Array, ceramic) —
Jenis Pemasangan Through-Hole / Socketed Surface Mount (PLCC socket or solder)
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status - legacy part]
Product Family — MAX 5000
Macrocell Count — 128
Logic Elements — Programmable AND/OR/XOR array
Bilangan Pin — 68
Package Type — PLCC-68 (JLCC) ceramic, J-leaded
Dedicated Inputs — 8
User I/O Pins — [DATA_NEEDED: user I/O pin count]
Programming Interface — Altera MAX+PLUS II / A+PLUS / legacy programmer
Lead-Free — [DATA_NEEDED: lead-free status]

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