EPM5128LC2 vs EPM5128JC Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5128LC2 sa pamamagitan ng Altera at EPM5128JC sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5128LC2 | EPM5128JC |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | MAX 5000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | EPLD / CPLD |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 8 | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Global Clock Inputs | 1 dedicated | — |
| Propagation Delay (tPD) | 45 ns | 35 ns |
| Supply Voltage (VCC) | 5 V | 5 V (typical) |
| Process Technology | CMOS EPROM | CMOS EPROM |
| Configuration Memory | On-chip EPROM (non-volatile) | UV-erasable EPROM (windowed package) |
| Boundary Scan | JTAG / IEEE 1149.1 | JTAG IEEE 1149.1 (family feature) |
| Temperature na Operasyon | -40 C to +85 C (extended commercial) | Commercial 0C to +70C |
| Packhaging | PGA (Pin Grid Array, ceramic) | — |
| Uri ng Pagpapasok | Through-Hole / Socketed | Surface Mount (PLCC socket or solder) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - legacy part] |
| Product Family | — | MAX 5000 |
| Macrocell Count | — | 128 |
| Logic Elements | — | Programmable AND/OR/XOR array |
| Bilang ng Pins | — | 68 |
| Package Type | — | PLCC-68 (JLCC) ceramic, J-leaded |
| Dedicated Inputs | — | 8 |
| User I/O Pins | — | [DATA_NEEDED: user I/O pin count] |
| Programming Interface | — | Altera MAX+PLUS II / A+PLUS / legacy programmer |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |