EPM5192JI-2 vs EPM5192LI-1 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5192JI-2 disebabkan oleh Altera dan EPM5192LI-1 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5192JI-2 EPM5192LI-1
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete NRND
Family MAX 5000 MAX 5000
Device Type EPLD (Erasable Programmable Logic Device) EPLD (UV-Erasable/OTP Complex PLD)
Macrocells 192 192
Usable Gates 5000 3,750
Dedicated Inputs 12 —
Flip-Flops 192 —
Speed Grade -2 -1
Kemasan JLCC-68 (J-Lead Ceramic) —
Suhu Operasi 0C to +70C (commercial) [DATA_NEEDED: industrial vs military range]
Programming Technology UV-Erasable EPROM —
Architecture Sum-of-products with Programmable Interconnect Array (PIA) EEPROM/EPROM-based, non-volatile, instant-on
Tegangan Pemberi Arus 5 V (typical) 5 V
Process Technology CMOS EPROM CMOS EPROM, UV-erasable
Jenis Pemasangan Surface Mount Surface Mount (JLCC with J-leads)
Status RoHS Non-compliant (ceramic JLCC, contains lead) [DATA_NEEDED: RoHS status of ceramic LI variant]
Status Lingkungan Hidup Obsolete (legacy Altera MAX 5000 family) —
Maximum Toggle Frequency — 40 MHz
Propagation Delay (tPD) — [DATA_NEEDED: tPD in ns at -1 grade]
User I/O Pins — [DATA_NEEDED: user I/O count for JLCC variant]
Package Type — JLCC (windowed, ceramic, UV-erasable)
Kiraan Pin — [DATA_NEEDED: pin count of LI package]
Aras MSL — [DATA_NEEDED: MSL level]
Lead Free — [DATA_NEEDED: lead-free]
Programmable Interconnect — Programmable Interconnect Array (PIA)

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