EPM7128BTC100-10 vs EPM7128STI100-10N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM7128BTC100-10 disebabkan oleh Intel dan EPM7128STI100-10N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EPM7128BTC100-10 - MAX 7000B CPLD, 128 Macrocells, 10ns | Intel
EPM7128BTC100-10 ⚠ Bahagian terakhir untuk beliAltera
EPM7128STI100-10N - 128-Macrocell CPLD, 10ns, 100-pin TQFP | Altera
EPM7128STI100-10N ObsoletePengandingan Spesifikasi
| Parametr | EPM7128BTC100-10 | EPM7128STI100-10N |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Masa Terakhir Dibeli | Obsolete |
| Family | MAX 7000B | MAX 7000S |
| Macrocells | 128 | 128 |
| Usable Gates | 2.5K | 2,500 (up to 5,000 family max) |
| User I/Os | 84 | — |
| Logic Array Blocks (LABs) | 8 (16 macrocells each) | 8 |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Frequency (fCNT) | 125 MHz | — |
| Core Voltage (VCCINT) | 2.5 V | — |
| I/O Voltage (VCCIO) | 3.3 V (5V tolerant inputs) | — |
| Kemasan | TQFP-100 | 100-pin TQFP |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| Suhu Operasi | 0C to +70C (commercial) | -40C to +85C (Industrial) |
| Status RoHS | Compliant (lead-free) | [DATA_NEEDED: RoHS status] |
| Technology | CMOS EEPROM | — |
| Architecture | — | CMOS EEPROM-based CPLD |
| Maximum User I/O | — | 84 |
| Pin-to-Pin Logic Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 175.4 MHz |
| Supply Voltage (VCC) | — | 5 V |
| In-System Programmability | — | Yes (JTAG IEEE 1149.1) |
| JTAG Boundary-Scan | — | Yes (BST) |
| Aras MSL | — | [DATA_NEEDED: MSL level] |
| Open-Drain I/O Option | — | Available (per MAX 7000A feature set) |