EPM7256SQC208-7N vs EPM7256SRC208-10 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM7256SQC208-7N disebabkan oleh Altera dan EPM7256SRC208-10 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM7256SQC208-7N EPM7256SRC208-10
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 7000S MAX 7000S
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 256 —
Usable Gates 5,000 —
Logic Array Blocks (LABs) 16 —
User I/O Pins 164 —
Speed Grade -7 (7.5 ns pin-to-pin) —
Maximum Frequency 128.2 MHz —
Supply Voltage (VCC) 5 V —
Technology CMOS EEPROM —
Configuration Memory Non-volatile EEPROM (no external config needed) —
Kemasan 208-pin PQFP (Plastic Quad Flat Pack) 208-pin RQFP (BFQFP) exposed pad, 28x28 mm
Jenis Pemasangan Surface Mount Surface Mount
Suhu Operasi Commercial (0C to +70C) 0C to +70C (TA, commercial)
JTAG Interface IEEE 1149.1 boundary-scan (ISP capable) —
Minimum DC Input Voltage -0.5 V —
Input Undershoot Tolerance -2.0 V for <100 mA, <20 ns —
Status RoHS Compliant (N suffix = lead-free) [DATA_NEEDED: RoHS status]
Pin-to-Pin Delay (tPD) 7.5 ns —
Open-Drain Output Optional per I/O pin —
Number of Macrocells — 256
Number of Logic Array Blocks (LABs) — 16
Number of Gates — 5000
Number of User I/O Pins — 164
Maximum Propagation Delay (tPD) — 10 ns
Maximum Operating Frequency — 100 MHz
Supply Voltage (Internal) — 4.75 V to 5.25 V
Programmable Type — In System Programmable (ISP, JTAG)
Configuration Technology — EEPROM
Terminal Form — Gull Wing
Package Shape — Square
Product Status — Obsolete

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