EPM9320RC208-10 vs EPM9320RC208-15 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9320RC208-10 disebabkan oleh Altera dan EPM9320RC208-15 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM9320RC208-10 | EPM9320RC208-15 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | Obsolete |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 6,000 | 6,000 |
| Macrocells | 320 | — |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Kemasan | 208-pin RQFP (RC) | 208-pin RQFP (Power QFP) |
| Suhu Operasi | Commercial (0C to +70C) - 'C' suffix | [DATA_NEEDED: operating temperature range] |
| Tegangan Pemberi Arus | 5 V | 5.0 V |
| Speed Grade | -10 | — |
| Programming Interface | JTAG (ByteBlaster/BitBlaster) | — |
| Non-volatile Configuration | Yes (EPROM/EEPROM based) | — |
| Design Tool Support | MAX+PLUS II, Quartus (legacy) | — |
| Status RoHS | ROHS3 Compliant (per fpgalink listing) | [DATA_NEEDED: RoHS status] |
| Tingkat sensitiviti Air Nama (MSL) | 3 (168 Hours) | — |
| Lead Time | 1-7 days (per fpgalink listing) | — |
| Device Family | — | MAX 9000 |
| Macro Cells | — | 320 |
| Pin-to-Pin Propagation Delay | — | 15 ns (speed grade -15) |
| Frekuensi Klock Maksimum | — | 117.6 MHz |
| Configuration Technology | — | EEPROM-based (non-volatile) |
| In-System Programmability | — | Yes (ISP via JTAG) |
| JTAG Interface | — | IEEE Std. 1149.1 |
| Package Type | — | 208-BFQFP Exposed Pad |
| Jenis Pemasangan | — | Surface Mount |
| Number of I/O Pins | — | [DATA_NEEDED: user I/O count] |
| Logic Array Blocks | — | [DATA_NEEDED: LAB count] |
| Status Lingkungan Hidup | — | Obsolete (PDN0706, 2007) |