EPM9560WC208-15 vs EPM9560WC208-20 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9560WC208-15 disebabkan oleh Altera dan EPM9560WC208-20 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EPM9560WC208-20 - 560-Macrocell CPLD, 23.6ns, PQFP-208 | Intel/Altera
EPM9560WC208-20 ObsoletePengandingan Spesifikasi
| Parametr | EPM9560WC208-15 | EPM9560WC208-20 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EE PLD (Electrically Erasable Programmable Logic Device) | CPLD (EPLD) |
| Technology | CMOS | — |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 35 | 35 |
| Flip-Flops | 772 | — |
| User I/O Pins (max) | 149 | — |
| Frekuensi Klock Maksimum | 117.6 MHz | — |
| Propagation Delay (tPD) | 16.6 ns | — |
| Speed Grade | -15 | — |
| Supply Voltage - I/O | 3.3 V or 5.0 V (configurable) | — |
| Kemasan | 208-pin CQFP (Ceramic Quad Flat Pack) | PQFP-208 (RQFP/WQFP) |
| Terminal Pitch | 0.50 mm | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1 boundary scan) | — |
| Status RoHS | RoHS3 Compliant (per third-party listings) | Non-compliant (legacy PQFP) [DATA_NEEDED: confirm from official doc] |
| User I/O Pins | — | 149 |
| Maximum Propagation Delay (tPD) | — | 23.6 ns |
| Process Technology | — | CMOS, EEPROM-based |
| Supply Voltage (VCCINT) | — | 5 V (typical, see datasheet) |
| I/O Voltage (VCCIO) | — | 3.3 V or 5 V (multi-voltage I/O) |
| In-System Programmability | — | Yes, JTAG BST (IEEE 1149.1) |
| Pin/Package Suffix | — | W = power PQFP; -20 = 23.6 ns speed grade |
| Suhu Operasi | — | Commercial (0C to +70C) [DATA_NEEDED: exact temp grade] |
| Lead-Free | — | [DATA_NEEDED] |
| Boson Bebas | — | [DATA_NEEDED] |
| Aras MSL | — | [DATA_NEEDED] |