DSPIC30F6013AT-20E/PT - 20 MIPS 16-bit DSC 132KB Flash TQFP-80
MPN: DSPIC30F6013AT-20E/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $12.85 | $12.85 |
| 10 | $11.62 | $116.20 |
| 100 | $10.42 | $1,042.00 |
| 500 | $9.18 | $4,590.00 |
| 1,000 | $8.05 | $8,050.00 |
DSPIC30F6013AT-20E/PT Overview
A Digital Signal Controller (DSC) is a hybrid architecture that combines the deterministic control advantages of a microcontroller (MCU) with the computational throughput of a Digital Signal Processor (DSP). The dsPIC30F family from Microchip occupies a specific point in the semiconductor taxonomy: MCU -> 16-bit MCU -> DSC -> dsPIC30F -> motor control / power conversion family. Engineers select DSCs over pure MCUs when the application requires high-speed math (Fast Fourier Transforms, digital control loops, encoder decoding) and over pure DSPs when deterministic interrupt latency and rich peripherals are required.
Key features of the DSPIC30F6013AT-20E/PT include its dual-port RAM architecture, dedicated DSP engine with a 17-bit x 17-bit multiplier and 40-bit accumulator, a 12-bit ADC capable of 200 ksps conversion across 16 analog input channels, and extensive connectivity peripherals including CAN 2.0B, I2C, SPI, and UART/USART. The device also integrates five 16-bit timer/counters, an input capture module, an output compare/PWM module with up to 8 PWM channels, and brown-out plus power-on reset supervision. The integrated DSP engine can execute a single-cycle MAC (multiply-accumulate) operation in one instruction cycle, providing the throughput needed for closed-loop digital control.
Architecturally, the DSPIC30F6013A family is built on a 5V-tolerant CMOS process with a modified Harvard architecture and 24-bit instruction width. The 'A' suffix denotes the second silicon revision, and the 'T' indicates tape-and-packaged delivery. The 80-pin TQFP package provides ample I/O (68 I/O pins) for systems integrating motor control, sensor fusion, and human-machine interface on a single device. Operating voltage spans 2.5V to 5.5V, supporting both 3.3V and 5V system designs.
Typical applications include AC induction motor and brushless DC motor control, sensorless field-oriented control (FOC), power conversion (UPS, PFC, digital switching power supplies), industrial automation, automotive sensor processing, and embedded audio processing. The integrated CAN 2.0B peripheral and the 12-bit ADC with dual sample-and-hold make the part particularly suited for automotive body and chassis ECUs and industrial servo drives.
When designing with the DSPIC30F6013AT-20E/PT, ensure the analog and digital supply pins (AVDD/AVSS and VDD/VSS) are properly decoupled with separate 10 uF and 100 nF capacitor pairs to achieve the ADC's published SNR performance. Program the configuration bits (FOSC, FWDT, FPOR) via the `#pragma config` directive in MPLAB X IDE before code generation to avoid unexpected oscillator or watchdog reset behavior.
This page synthesizes distributor pricing, same-family and cross-family alternatives in the TQFP-80 footprint, and practical design notes that go beyond the bare manufacturer datasheet. Engineers comparing drop-in MCU alternatives or evaluating AEC-Q100 options can use the comparison_table below to make a procurement-grade decision.
Drop-in alternatives for DSPIC30F6013AT-20E/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC30F6013AT-20E/PT (same form factor and footprint) — differing in Package, Operating Temperature, Core Architecture, ADC, RoHS Status.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC30F6013AT-20E/PF
✅ Drop-In✓ In Stock
$7.3 / Unit
View Datasheet →DSPIC30F6013A-20E/PT
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC30F6013A-30I/PT
✅ Drop-In ⚠️ 参数待验证✓ In Stock
$10.93 / Unit
View Datasheet →DSPIC30F6013A-30I/PF
✅ Drop-In ⚠️ 参数待验证✓ In Stock
$14.2 / Unit
View Datasheet →DSPIC30F6013A-20E/PF
✅ Drop-In✓ In Stock
$7.95 / Unit
View Datasheet →DSPIC30F6014AT-20E/PF
✅ Drop-In✓ In Stock
$12.4 / Unit
View Datasheet →DSPIC30F6012AT-30I/PF
✅ Drop-In ⚠️ 参数待验证✓ In Stock
$11.2 / Unit
View Datasheet →DSPIC30F6010AT-20E/PT
✅ Drop-In ⚠️ 参数待验证✓ In Stock
$8.1 / Unit
View Datasheet →DSPIC30F6013AT-20E/PT Maximum Ratings & Electrical Characteristics
| Core Architecture | dsPIC30F 16-bit DSC (modified Harvard) |
| CPU Core | dsPIC 16-bit, 24-bit instruction word |
| Maximum CPU Speed | 20 MIPS (40 MHz oscillator, 4 MHz instruction cycle) |
| Program Memory (Flash) | 132 KB (44K x 24) |
| RAM | 6 KB |
| ADC | 12-bit, 16 channels, 200 ksps |
| DSP Engine | 17-bit x 17-bit multiplier, 40-bit accumulator, single-cycle MAC |
| Operating Voltage | 2.5 V to 5.5 V |
| Operating Temperature Range | -40C to +125C (E suffix = industrial extended) |
| Package | 80-pin TQFP (PT), 12x12 mm, 0.5 mm pitch |
| Mounting Type | Surface Mount |
| I/O Pins | 68 |
| Communication Peripherals | CAN 2.0B, I2C, SPI, UART/USART |
| PWM Channels | 8 (Output Compare / PWM module) |
| Timers | Five 16-bit timer/counters |
| MSL Level | MSL3 (per JEDEC J-STD-020) |
| RoHS Status | Compliant |
DSPIC30F6013AT-20E/PT Pin Configuration
| Pin 1 | OSC1 — Crystal oscillator input |
| Pin 2 | OSC2 — Crystal oscillator output |
| Pin 3 | FLTA — PWM Fault A input |
| Pin 4 | PWM1L — PWM1 Low-side output |
| Pin 5 | PWM1H — PWM1 High-side output |
| Pin 6 | PWM2L — PWM2 Low-side output |
| Pin 7 | PWM2H — PWM2 High-side output |
| Pin 8 | PWM3L — PWM3 Low-side output |
| Pin 9 | PWM3H — PWM3 High-side output |
| Pin 10 | PWM4L — PWM4 Low-side output |
| Pin 11 | PWM4H — PWM4 High-side output |
| Pin 12 | VDD — Digital supply voltage 2.5V to 5.5V |
| Pin 13 | VSS — Digital ground |
| Pin 14 | PWM5L — PWM5 Low-side output |
| Pin 15 | PWM5H — PWM5 High-side output |
| Pin 16 | PWM6L — PWM6 Low-side output |
| Pin 17 | PWM6H — PWM6 High-side output |
| Pin 18 | PWM7L — PWM7 Low-side output |
| Pin 19 | PWM7H — PWM7 High-side output |
| Pin 20 | PWM8L — PWM8 Low-side output |
| Pin 21 | PWM8H — PWM8 High-side output |
| Pin 22 | VDD — Digital supply voltage |
| Pin 23 | VSS — Digital ground |
| Pin 24 | AN0 — Analog input 0 / VREF+ |
| Pin 25 | AN1 — Analog input 1 |
| Pin 26 | AN2 — Analog input 2 |
| Pin 27 | AN3 — Analog input 3 |
| Pin 28 | AN4 — Analog input 4 |
| Pin 29 | AN5 — Analog input 5 |
| Pin 30 | AN6 — Analog input 6 |
| Pin 31 | AN7 — Analog input 7 |
| Pin 32 | AVDD — Analog supply voltage |
| Pin 33 | AVSS — Analog ground |
| Pin 34 | AN8 — Analog input 8 |
| Pin 35 | AN9 — Analog input 9 |
| Pin 36 | AN10 — Analog input 10 |
| Pin 37 | AN11 — Analog input 11 |
| Pin 38 | AN12 — Analog input 12 |
| Pin 39 | AN13 — Analog input 13 |
| Pin 40 | AN14 — Analog input 14 |
| Pin 41 | AN15 — Analog input 15 |
| Pin 42 | VDD — Digital supply voltage |
| Pin 43 | VSS — Digital ground |
| Pin 44 | INT0 — External interrupt 0 |
| Pin 45 | INT1 — External interrupt 1 |
| Pin 46 | INT2 — External interrupt 2 |
| Pin 47 | INT3 — External interrupt 3 |
| Pin 48 | INT4 — External interrupt 4 |
| Pin 49 | TMR1CK — Timer1 external clock |
| Pin 50 | TMR2CK — Timer2 external clock |
| Pin 51 | TMR3CK — Timer3 external clock |
| Pin 52 | TMR4CK — Timer4 external clock |
| Pin 53 | TMR5CK — Timer5 external clock |
| Pin 54 | IC1 — Input Capture 1 |
| Pin 55 | IC2 — Input Capture 2 |
| Pin 56 | IC3 — Input Capture 3 |
| Pin 57 | IC4 — Input Capture 4 |
| Pin 58 | OC1 — Output Compare 1 |
| Pin 59 | OC2 — Output Compare 2 |
| Pin 60 | OC3 — Output Compare 3 |
| Pin 61 | OC4 — Output Compare 4 |
| Pin 62 | U1RX — UART1 receive |
| Pin 63 | U1TX — UART1 transmit |
| Pin 64 | U2RX — UART2 receive |
| Pin 65 | U2TX — UART2 transmit |
| Pin 66 | SCK1 — SPI1 clock |
| Pin 67 | SDI1 — SPI1 data in |
| Pin 68 | SDO1 — SPI1 data out |
| Pin 69 | SS1 — SPI1 slave select |
| Pin 70 | SCL — I2C clock |
| Pin 71 | SDA — I2C data |
| Pin 72 | C1RX — CAN1 receive |
| Pin 73 | C1TX — CAN1 transmit |
| Pin 74 | VDD — Digital supply voltage |
| Pin 75 | VSS — Digital ground |
| Pin 76 | MCLR — Master clear / reset input |
| Pin 77 | PGEC1 — ICSP programming clock 1 |
| Pin 78 | PGED1 — ICSP programming data 1 |
| Pin 79 | PGEC2 — ICSP programming clock 2 |
| Pin 80 | PGED2 — ICSP programming data 2 |
Typical Applications
DSPIC30F6013AT-20E/PT is suitable for 6 applications: Three-Phase Brushless DC Motor Control, AC Induction Motor Field-Oriented Control, Digital Power Factor Correction (PFC) and SMPS, Industrial CAN-Node Sensor Processing, Solar Micro-Inverter Control, Automotive Body and Aftermarket ECU.
Three-Phase Brushless DC Motor Control
The DSPIC30F6013AT-20E/PT is engineered for 3-phase brushless DC (BLDC) and permanent-magnet synchronous motor (PMSM) control. Its 20 MIPS throughput and 8-channel PWM module with programmable dead-time generators deliver complementary outputs at switching frequencies up to 20 kHz, sufficient for 50 kHz-loop bandwidth FOC drives. The 12-bit ADC with dual sample-and-hold allows simultaneous phase current sensing on two shunt resistors in a single ADC conversion window, eliminating sequential sampling skew that would distort the Park transformation. The DSP engine executes a single-cycle 17-bit x 17-bit MAC into a 40-bit accumulator, so Clarke and Park transforms plus inverse-Park and SVPWM calculation complete in under 5 microseconds - leaving CPU margin for speed PI, current PI, and the outer torque controller. Use it between the gate driver (e.g., Microchip MCP8024) and the CAN-based command interface for industrial servo drives, drone ESCs, and EV traction auxiliary motors.
Recommended
AC Induction Motor Field-Oriented Control
For AC induction motor drives, the DSPIC30F6013AT-20E/PT integrates a single-cycle MAC DSP engine, a 200 ksps 12-bit ADC, and CAN 2.0B connectivity required for industrial fieldbus integration. Indirect field-oriented control (IFOC) with slip estimation requires rotor flux angle calculation every PWM cycle; the 20 MIPS throughput allows the full Clarke-Park-id/iq-SVPWM chain to execute in approximately 4 microseconds at a 10 kHz PWM rate. The CAN 2.0B peripheral supports CANopen or DeviceNet command frames from a PLC, enabling drop-in integration into industrial automation cabinets. Pair with current-sense amplifiers (e.g., MCP6C04) and an isolated gate driver (e.g., Si8271) for a complete 1 kW to 10 kW variable-frequency drive.
Recommended
Digital Power Factor Correction (PFC) and SMPS
The DSPIC30F6013AT-20E/PT is well-matched to digital PFC boost converters and digital switch-mode power supplies operating at 50 kHz to 500 kHz. The DSP engine's single-cycle MAC is sufficient to run average-current-mode control with input voltage feedforward in real time, while the 12-bit ADC samples inductor current and input/output voltage at 200 ksps with minimal aliasing. The 6 KB of RAM holds the controller state and the soft-start ramp variables without overflowing stack space during interrupt-driven control loops. For a 1 kW totem-pole PFC or a 500 W full-bridge LLC resonant converter, the part pairs naturally with synchronous rectifier gate drivers (e.g., UCC24612) and digital isolators (e.g., ISO7710) on the high-voltage primary side.
Recommended
Industrial CAN-Node Sensor Processing
The DSPIC30F6013AT-20E/PT is qualified for industrial CAN nodes that require both CAN 2.0B connectivity and 16-channel 12-bit ADC processing for sensor fusion applications. The 132 KB Flash accommodates CANopen or J1939 protocol stacks plus application code, and the 6 KB RAM handles CAN message buffers without external memory. In a hydraulic pressure sensor node, for example, the part can digitize up to 16 strain-gauge bridges, apply digital filtering via the DSP engine, and broadcast processed values over CAN at 1 Mbaud. The 5V-tolerant I/O and industrial -40C to +125C temperature range (E suffix) suit outdoor and factory-floor installations.
Recommended
Solar Micro-Inverter Control
For photovoltaic micro-inverters in the 200 W to 500 W range, the DSPIC30F6013AT-20E/PT delivers the MPPT control loop, grid-synchronization PLL, and anti-islanding detection all on a single chip. The DSP engine computes the sinusoidal reference and quadrature PLL in real time, while the 12-bit ADC samples the PV panel voltage and grid voltage at sufficient bandwidth for cycle-by-cycle zero-crossing detection. The integrated PWM module generates the 50/60 Hz grid-tie reference with the dead-time needed for the H-bridge. Operating temperature up to +125C allows deployment in sealed outdoor enclosures without active cooling.
Recommended
Automotive Body and Aftermarket ECU
Although not AEC-Q100 qualified as a stand-alone part, the DSPIC30F6013AT-20E/PT is widely deployed in aftermarket and non-safety automotive ECUs such as gauge clusters, auxiliary lighting controllers, and body-comfort modules. Its industrial -40C to +125C temperature rating handles under-dash thermal environments, and the integrated CAN 2.0B peripheral integrates with vehicle CAN buses via a high-speed transceiver (e.g., ATA6560). The 132 KB Flash hosts the J1939 or CANopen protocol stack plus the application code, while the 6 KB RAM buffers CAN message queues. For OEM safety-critical applications, evaluate the dsPIC33EP family with explicit AEC-Q100 part numbers.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC30F6013AT-20E/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC30F6013AT-20E/PF | DSPIC30F6013A-20E/PT | DSPIC30F6013A-30I/PT | DSPIC30F6014AT-20E/PF |
|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 80-pin TQFP (PT, 12x12 mm) | 80-pin TQFP (PF, 14x14 mm) - same footprint | 80-pin TQFP (PT, 12x12 mm) - same | 80-pin TQFP (PT, 12x12 mm) - same | 80-pin TQFP (PF, 14x14 mm) - same footprint |
| CPU Speed (MIPS) | 20 MIPS | 20 MIPS | 20 MIPS | 30 MIPS | 20 MIPS |
| Flash Memory | 132 KB | 132 KB | 132 KB | 132 KB | 144 KB |
| RAM | 6 KB | 6 KB | 6 KB | 6 KB | 6 KB |
| ADC | 12-bit, 16 channels, 200 ksps | 12-bit, 16 channels, 200 ksps | 12-bit, 16 channels, 200 ksps | 12-bit, 16 channels, 200 ksps | 12-bit, 16 channels, 200 ksps |
| CAN Peripheral | CAN 2.0B | CAN 2.0B | CAN 2.0B | CAN 2.0B | CAN 2.0B |
| Operating Temperature | -40C to +125C (E) | -40C to +125C (E) | -40C to +125C (E) | -40C to +85C (I) | -40C to +125C (E) |
| Delivery Form | Tape and Reel (T suffix) | Tape and Reel (T suffix) | Tray (no T suffix) | Tray (no T suffix) | Tape and Reel (T suffix) |
Key Differentiators
- Smaller 12x12 mm TQFP outline vs the 14x14 mm PF variant (vs DSPIC30F6013AT-20E/PF)
- Tape-and-reel packaging for high-volume SMT assembly (vs DSPIC30F6013A-20E/PT)
- Extended -40C to +125C temperature rating for industrial and harsh environments (vs DSPIC30F6013A-30I/PT)
Design Notes
Estimated: at 5V VDD with the CPU at 20 MIPS active and all peripherals enabled, the DSPIC30F6013AT-20E/PT core current draw is approximately 60 mA to 80 mA typical. Decouple each VDD/VSS pair with a 100 nF ceramic capacitor placed within 5 mm of the pin, and place a single 10 uF bulk tantalum or ceramic capacitor on the board. AVDD and AVSS require their own 100 nF + 10 uF pair, ideally with a ferrite bead between digital and analog supplies to achieve the published 12-bit ADC SNR. Program the LVD (Low-Voltage Detect) trip point via the #pragma config FPOR directive in MPLAB X IDE to ensure brown-out reset triggers below 2.5V.
The 80-pin TQFP package has a theta_JA of approximately 50 C/W on a 4-layer JEDEC test PCB. At 5V VDD with 70 mA active current, power dissipation is approximately 350 mW, yielding a junction temperature rise of approximately 18C above ambient - well within the 125C maximum. In sealed enclosures without airflow or at high ambient temperatures (>70C), add a copper pour under the exposed die pad area (TQFP center pad) and route multiple thermal vias to inner ground planes to reduce junction temperature by 20-30%.
Route the analog inputs AN0-AN15 as far from the digital switching lines (PWM outputs, oscillator traces) as possible to preserve ADC accuracy. Use a ground plane under the analog section and route AVDD/AVSS with wider traces than digital supplies. Place the ADC reference decoupling capacitor (typically 100 nF) directly at the AVDD pin. For high-current motor drive applications, isolate the digital ground return path from the high-current switching return path with a star-ground connection at the MCU VSS pins to avoid ground bounce affecting ADC conversions.
Configuration bits (FOSC, FWDT, FPOR, FGS, etc.) MUST be set via #pragma config in source code; if left at default factory values, the watchdog timer is enabled and may reset the device unexpectedly during debugging. The MCLR pin must be pulled high via a 10 kohm resistor; leaving it floating causes intermittent resets. For ICSP programming, ensure PGEC1/PGED1 (and optionally PGEC2/PGED2) are accessible on the PCB with test points or a 6-pin header - do not route these pins to other functions without considering programming access.
Compliance Information
RoHS compliant per Microchip product page; MSL3 per JEDEC J-STD-020; not AEC-Q100 qualified as stand-alone part - for AEC-Q100 designs evaluate dsPIC33EP family. Lead-free and halogen-free per Microchip environmental compliance documentation.
