DSPIC33EP128GP502T-I/MM - 16-bit 70 MIPS DSC 128KB Flash QFN-28 | Microchip
MPN: DSPIC33EP128GP502T-I/MM ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $3.55 | $3.55 |
| 10 | $3.36 | $33.60 |
| 100 | $3.05 | $305.00 |
| 500 | $2.85 | $1,425.00 |
| 1,000 | $2.68 | $2,680.00 |
DSPIC33EP128GP502T-I/MM Overview
A digital signal controller combines the control peripherals of a microcontroller with the computational throughput of a DSP engine. Within the power management hierarchy, the dsPIC33E family sits between general-purpose MCUs (such as the PIC16 and PIC18) and dedicated DSPs, offering a 16-bit modified Harvard architecture, DSP multiply-accumulate instructions, and rich analog integration on a single chip.
Key features include the 70 MIPS dsPIC33E core with DSP engine, an on-chip 10-bit ADC with up to 1.1 Msps throughput for simultaneous multi-channel sampling, high-speed PWM modules suited for digital power conversion, CAN 2.0B communication, and a Charge Time Measurement Unit (CTMU) for capacitive touch and precise timing. Integrated op-amp and comparator peripherals reduce external component count in signal conditioning chains, while the Peripheral Trigger Generator (PTG) automates peripheral sequencing offloads from the CPU.
The dsPIC33EP128GP502 operates from a 3.0V to 3.6V supply across the industrial -40C to +85C temperature range (the -I suffix). Code is executed from a wide-voltage flash program memory with self-programming support. The 28-pin QFN-S (6x6 mm) footprint with 0.5 mm pitch suits compact, thermally demanding designs.
Typical applications include digital power supplies and PFC stages exploiting the high-speed PWM, brushless DC and PMSM motor control using the ADC-plus-PWM trigger chain, and industrial sensing nodes using CAN and the integrated analog front end.
For design, place a low-ESR capacitor on the VCAP/VDDCORE pin as required by the datasheet, and use the dual oscillator and PLL options carefully to hit the 70 MIPS ceiling. This page adds distributor pricing, drop-in family alternatives, and design guidance not found in the manufacturer datasheet.
Drop-in alternatives for DSPIC33EP128GP502T-I/MM — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33EP128GP502T-I/MM (same form factor and footprint) — differing in Operating Temperature, Package, Core Architecture, Packaging, SRAM.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33EP256GP502T-I/MM
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$3.1 / Unit
View Datasheet →DSPIC33EP64GP502T-I/MM
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33EP32GP502T-I/MM
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$2.19 / Unit
View Datasheet →DSPIC33EP128MC502T-I/MM
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33EP128GP502T-I/MM Maximum Ratings & Electrical Characteristics
| Core Architecture | 16-bit dsPIC33E modified Harvard |
| Maximum CPU Speed | 70 MIPS |
| Program Memory (FLASH) | 128 KB (43K x 24) |
| SRAM | 16 KB |
| Supply Voltage Range | 3.0 V to 3.6 V |
| ADC Resolution | 10-bit |
| ADC Throughput | 1.1 Msps |
| CAN | CAN 2.0B |
| Communication Peripherals | UART, SPI, I2C, CAN |
| Timers | CTMU, high-speed PWM |
| Operating Temperature | -40C to +85C |
| Package | 28-QFN-S (6x6 mm) |
| Mounting Type | Surface Mount |
| Packaging Suffix | T (Tape & Reel) |
| Grade / Temperature Code | -I (Industrial) |
| Analog Peripherals | Op amps, comparators, CTMU |
| Special Peripherals | Peripheral Trigger Generator (PTG) |
DSPIC33EP128GP502T-I/MM Pin Configuration
| Pin 1 | MCLR — Master clear reset (active low), programming voltage input |
| Pin 2 | AN0/VREF+/CN2/RB0 — Analog input 0 / positive voltage reference / change notification / port B bit 0 |
| Pin 3 | AN1/VREF-/CN3/RB1 — Analog input 1 / negative voltage reference / change notification / port B bit 1 |
| Pin 4 | AN2/SS1/CN4/RB2 — Analog input 2 / SPI slave select 1 / port B bit 2 |
| Pin 5 | AN3/C1IN-/CN5/RB3 — Analog input 3 / comparator 1 inverting input / port B bit 3 |
| Pin 6 | AN4/C1IN+/CN6/RB4 — Analog input 4 / comparator 1 non-inverting input / port B bit 4 |
| Pin 7 | VDD — Positive supply |
| Pin 8 | VSS — Ground reference |
| Pin 9 | OSC1/CLKI/CN7/RA2 — Oscillator crystal input / external clock input / port A bit 2 |
| Pin 10 | OSC2/CLKO/CN8/RA3 — Oscillator crystal output / clock output / port A bit 3 |
| Pin 11 | VCAP/VDDCORE — Core voltage regulator capacitor connection |
| Pin 12 | VSS — Ground reference |
| Pin 13 | SOSCI/CN9/RB5 — Secondary oscillator input / port B bit 5 |
| Pin 14 | SOSCO/T1CK/CN10/RB6 — Secondary oscillator output / Timer 1 clock input / port B bit 6 |
| Pin 15 | AN9/RP20/CN11/RB7 — Analog input 9 / remappable RP20 / port B bit 7 |
| Pin 16 | AN10/RP17/CTED1/CN12/RB8 — Analog input 10 / remappable RP17 / CTMU edge detect 1 / port B bit 8 |
| Pin 17 | AN11/RP13/CTED2/CN13/RB9 — Analog input 11 / remappable RP13 / CTMU edge detect 2 / port B bit 9 |
| Pin 18 | PGD3/AN12/RP11/CN14/RB10 — Programming data 3 / analog input 12 / remappable RP11 / port B bit 10 |
| Pin 19 | PGC3/AN13/RP10/CN15/RB11 — Programming clock 3 / analog input 13 / remappable RP10 / port B bit 11 |
| Pin 20 | VSS — Ground reference |
| Pin 21 | VDD — Positive supply |
| Pin 22 | PGD2/AN14/RP26/CN16/RB12 — Programming data 2 / analog input 14 / remappable RP26 / port B bit 12 |
| Pin 23 | PGC2/AN15/RP19/CN17/RB13 — Programming clock 2 / analog input 15 / remappable RP19 / port B bit 13 |
| Pin 24 | AVSS — Analog ground reference |
| Pin 25 | AVDD — Analog positive supply |
| Pin 26 | PGD1/AN5/RP35/CN27/RB15 — Primary programming data / analog input 5 / remappable RP35 / port B bit 15 |
| Pin 27 | PGC1/AN6/RP34/CN26/RB14 — Primary programming clock / analog input 6 / remappable RP34 / port B bit 14 |
| Pin 28 | VDD — Positive supply |
Typical Applications
DSPIC33EP128GP502T-I/MM is suitable for 6 applications: Digital Power Supplies and PFC, BLDC / PMSM Motor Control, CAN Networking Industrial Nodes, Sensor Signal Conditioning and Data Acquisition, Embedded Lighting and Display Control, Portable Instrumentation and IoT Edge Devices.
Digital Power Supplies and PFC
The DSPIC33EP128GP502T-I/MM fits digital power conversion because its high-speed PWM offers nanosecond-class resolution and dead-time control, while the 10-bit ADC samples output voltage and inductor current at up to 1.1 Msps. In a typical buck or PFC stage, the ADC is triggered by the PWM to sample at the midpoint of the on-time, minimizing switching-noise corruption; the control loop then runs in the 70 MIPS core with DSP MAC instructions accelerating PID and compensator math. The Peripheral Trigger Generator can chain ADC conversion-complete events to PWM updates with no CPU load, cutting loop latency. Unlike analog controllers, this DSC allows firmware-adjustable compensation, soft-start, and fault handling; the trade-off is that firmware validation is mandatory before production release.
Recommended
BLDC / PMSM Motor Control
For brushless DC and PMSM drives, the DSPIC33EP128GP502T-I/MM provides the classic field-oriented-control chain: high-speed PWM generating six complementary outputs with programmable dead time, the 10-bit ADC capturing phase currents and bus voltage synchronously with PWM events, and comparators providing hardware-cycle-by-cycle current limiting independent of the CPU. The 70 MIPS core executes FOC transforms with DSP multiply-accumulate instructions, leaving headroom for speed loops and communication. Microchip's motor-control application libraries and reference designs target this exact family, shortening development time. The integrated op amps can condition shunt-resistor signals, reducing external amplifier components. Designers should budget careful attention to ADC trigger alignment and dead-time calibration to minimize torque ripple and audible noise in compact 28-pin designs.
Recommended
CAN Networking Industrial Nodes
The on-chip CAN 2.0B module makes the DSPIC33EP128GP502T-I/MM a strong fit for industrial fieldbus nodes, HVAC controllers, and vehicle-area sensing. CAN handling in hardware offloads message buffering and arbitration from the 70 MIPS core, while UART, SPI and I2C bridges connect to gateways, displays and sensors. The 128KB FLASH accommodates protocol stacks and bootloader code with room to spare, and the 16KB SRAM supports queuing without external memory. The CTMU plus analog inputs enable capacitive touch or precise resistive sensing directly on the same chip. Compared with a separate MCU-plus-CAN-controller two-chip solution, this single-chip integration reduces BOM cost, board area and failure points; the constraint is the 3.0V to 3.6V supply, which typically requires a transceiver supply and level planning with a 5V CAN transceiver.
Recommended
Sensor Signal Conditioning and Data Acquisition
With integrated op amps, comparators, a 1.1 Msps 10-bit ADC and the CTMU, the DSPIC33EP128GP502T-I/MM forms a compact analog front end for industrial sensing nodes. The on-chip op amps can amplify shunt or bridge sensor outputs before ADC sampling, eliminating an external amplifier stage; comparators provide threshold alarms with zero firmware latency; and the CTMU measures capacitance or precise time intervals for touch and ultrasonic sensing. The DSP engine applies filtering and calibration math on-die, and results stream out over UART, SPI, I2C or CAN. The 28-QFN-S 6x6 mm package keeps the whole acquisition chain in a small footprint suitable for probe-type and embedded instruments. Trade-off: the 10-bit resolution suits control and monitoring, but higher-precision metrology demands an external higher-resolution ADC.
Recommended
Embedded Lighting and Display Control
The DSPIC33EP128GP502T-I/MM serves LED lighting, dimming and small display controller roles by pairing high-speed PWM channels with the 70 MIPS core for color mixing, phase-cut dimming, and closed-loop current regulation. PWM resolution at these frequencies is high enough to eliminate visible flicker, while the ADC monitors LED string current and temperature via NTC inputs on analog-capable port pins. CAN or UART connectivity enables DALI-style or DMX-adjacent networked lighting architectures within one chip. The 3.0V to 3.6V supply matches modern logic and display interface levels, and the industrial -40C to +85C range covers outdoor luminaires. Compared with dedicated LED driver ICs, this DSC adds programmability for multi-channel animations and communication; the cost is firmware complexity and the need to validate EMC behavior of firmware-driven switching edges.
Recommended
Portable Instrumentation and IoT Edge Devices
Battery-powered and portable instruments benefit from the DSPIC33EP128GP502T-I/MM's combination of DSP throughput and low-footprint integration. Power-managed operating modes and the ability to run from internal oscillators reduce external components, while the VCAP/VDDCORE architecture supports the 70 MIPS core from a compact 6x6 mm QFN. The 128KB FLASH holds rich application firmware, GUI protocol handling and OTA-style bootloaders, and multiple serial ports connect Bluetooth or LoRa radios for IoT edge roles. The CTMU supports capacitive touch user interfaces directly. Relative to a general-purpose PIC16, this part provides orders-of-magnitude more math throughput for FFT-based vibration or acoustic analysis; relative to a full application processor, it trades raw throughput for deterministic real-time behavior and microamp-class standby behavior. Always measure actual sleep-mode current against the datasheet tables for battery budgets.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33EP128GP502T-I/MM — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33EP256GP502T-I/MM | DSPIC33EP64GP502T-I/MM | DSPIC33EP32GP502T-I/MM | DSPIC33EP128MC502T-I/MM |
|---|---|---|---|---|---|
| Package | 28-QFN-S (6x6 mm) | 28-QFN-S (6x6 mm) - same | 28-QFN-S (6x6 mm) - same | 28-QFN-S (6x6 mm) - same | 28-QFN-S (6x6 mm) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| FLASH Program Memory | 128 KB (43K x 24) | 256 KB (86K x 24) | 64 KB (22K x 24) | 32 KB (11K x 24) | 128 KB (43K x 24) |
| SRAM | 16 KB | 16 KB | 16 KB | 16 KB | 16 KB |
| CPU Speed | 70 MIPS | 70 MIPS | 70 MIPS | 70 MIPS | 70 MIPS |
| Peripheral Focus | General purpose (GP) | General purpose (GP) | General purpose (GP) | General purpose (GP) | Motor control (MC) |
| Operating Temperature | -40C to +85C (-I) | -40C to +85C (-I) | -40C to +85C (-I) | -40C to +85C (-I) | -40C to +85C (-I) |
Key Differentiators
- Balanced 128KB FLASH capacity in the GP502 family (vs DSPIC33EP64GP502T-I/MM)
- Memory headroom for growth (vs DSPIC33EP32GP502T-I/MM)
- Cost-optimized vs larger memory variant (vs DSPIC33EP256GP502T-I/MM)
- General-purpose vs motor-control peripheral mix (vs DSPIC33EP128MC502T-I/MM)
Design Notes
The DSPIC33EP128GP502T-I/MM uses an internal core regulator, so the VCAP/VDDCORE pin (pin 11) must have a low-ESR ceramic capacitor of the value specified in the Microchip family datasheet connected to VSS, placed as close to the pin as possible. Supply is 3.0V to 3.6V; the three VDD pins (7, 21, 28) each need local 0.1uF decoupling, and AVDD (pin 25) should be filtered with an RC or ferrite from the digital rail to keep ADC noise low. Estimated: at 70 MIPS typical active current in the tens-of-mA class, a 3.3V rail sized at 100 mA headroom covers the DSC plus small loads.
The 28-QFN-S 6x6 mm package has a center exposed pad that should be soldered to a grounded copper pour for both mechanical reliability and thermal dissipation. Keep the crystal/secondary oscillator traces short and guard them with ground; route analog traces (AN0-AN15, AVDD/AVSS) away from PWM and switching nodes. The PGD1/PGC1 pair on pins 26/27 is the primary programming interface - add a standard 5-pin ICSP header footprint even in production boards to allow field firmware updates without rework.
Three pitfalls recur with dsPIC33EP designs: (1) leaving analog-capable port B pins floating - configure unused AN pins as digital outputs low to prevent comparator/op-amp input oscillation; (2) omitting the MCLR pull-up resistor and ignoring brown-out configuration, causing spurious resets on noisy industrial supplies; (3) clock configuration errors - the 70 MIPS maximum requires the correct PLL postscaler settings, and driving beyond FMAX violates timing. Always recompile with the target device selected to catch memory-boundary issues when substituting 32KB/64KB FLASH family siblings for the 128KB part.
Compliance Information
Standard -I commercial/industrial grade part; AEC-Q100 qualification applies to the E-grade SSOP variant (DSPIC33EP128GP502T-E/SS) per distributor data, not this QFN industrial part. RoHS/REACH status to be confirmed from Microchip's official environmental page.
