DSPIC33FJ128MC710A-E/PT - 16-bit 40MIPS 128KB Flash DSC Motor Control TQFP-100
MPN: DSPIC33FJ128MC710A-E/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $7.65 | $7.65 |
| 10 | $7.21 | $72.10 |
| 100 | $6.47 | $647.00 |
| 500 | $5.83 | $2,915.00 |
| 1,000 | $5.3 | $5,300.00 |
DSPIC33FJ128MC710A-E/PT Overview
Background - what is a Digital Signal Controller (DSC): a DSC such as the DSPIC33FJ128MC710A is a hybrid MCU/DSP that fuses the deterministic peripheral and interrupt behavior of a microcontroller with single-cycle MAC (multiply-accumulate) DSP operations. It sits within the hierarchy: DSC -> 16-bit microcontroller -> embedded MCU -> microcontroller IC. The dsPIC33F Motor Control sub-family in particular targets high-performance digital motor loops where PWM resolution, ADC sampling rate, and instruction determinism must coexist with code density higher than discrete DSP+MCU pairings.
Key features of the DSPIC33FJ128MC710A-E/PT include: 40 MIPS performance from a 3.3V supply, a 128 KB Flash program store, 8 KB of data RAM with 8 DMA channels, motor-control PWM modules with up to 8 outputs, a 10/12-bit ADC, dedicated quadrature encoder interfaces, and an integrated CAN module (ECAN). The 100-pin TQFP-100 package exposes the full peripheral set and is the largest variant of this family, sufficing for multi-axis motor drive designs.
Technically, the device implements a modified Harvard architecture with a 16-bit data path and a 24-bit instruction word, plus a DSP engine with a 40-bit accumulator for high-dynamic-range control loops. The /PT suffix on the package indicates the -40C to +125C extended-grade operating temperature range, while /E in the part number designates Enhanced (industrial) temperature, suiting factory-floor environments. The CMOS process core, eight DMA channels, and dual Flash panels enable live firmware updates and low-latency sensor feedback, which are critical for sensorless FOC and BLDC commutation.
Typical applications for the DSPIC33FJ128MC710A-E/PT include brushless DC motor (BLDC) and permanent-magnet synchronous motor (PMSM) field-oriented control, three-phase induction motor drives, switched reluctance motor control, digitally controlled UPS and solar inverters, automotive sensor modules, and industrial PLC positioning blocks.
A key design consideration is supply decoupling: with nine PWM channels and high-speed ADC sampling, place at least 100 nF and 10 uF ceramic decoupling on each VDD/AVDD pair and route motor switching traces away from analog inputs to preserve ADC SNR.
This page synthesizes Microchip product data, distributor pricing, and drop-in alternative MPNs not consolidated in the original datasheet - giving engineers a single shopping point for comparison and procurement.
Drop-in alternatives for DSPIC33FJ128MC710A-E/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33FJ128MC710A-E/PT (same form factor and footprint) — differing in Operating Temperature, Package, ADC, Core Architecture, Timers.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33FJ128MC510A-I/PF
✅ Drop-In✓ In Stock
$8.1 / Unit
View Datasheet →DSPIC33FJ128MC510A-E/PT
✅ Drop-In✓ In Stock
$5.45 / Unit
View Datasheet →DSPIC33FJ128MC710ATH/PT
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33FJ128MC510A-I/PT
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33FJ128MC506A-E/PT
✅ Drop-In✓ In Stock
$6.9 / Unit
View Datasheet →DSPIC33FJ128MC710A-E/PT Maximum Ratings & Electrical Characteristics
| Core Architecture | dsPIC33F (modified Harvard, 16-bit data, 24-bit instruction) |
| CPU Speed | 40 MIPS at 40 MHz |
| Program Memory (Flash) | 128 KB (128K x 8) |
| Data RAM | 8 KB SRAM |
| DMA Channels | 8 |
| Timers | 9 (5 x 16-bit, 4 x 32-bit) |
| Supply Voltage (VDD) | 3.0 V to 3.6 V |
| Operating Temperature | -40 C to +125 C (Extended) |
| Motor Control PWM | Yes, dedicated PWM module |
| ADC | 10/12-bit, multi-channel |
| Communication | ECAN, I2C, SPI, UART |
| Package | 100-TQFP (12 x 12 mm) |
| Mounting Type | Surface Mount |
| RoHS Status | Compliant |
| Processor Family | dsPIC33F Motor Control |
DSPIC33FJ128MC710A-E/PT Pin Configuration
| Pin 1 | RP15/C1IND/RG0 — Remappable pin/Analog comparator input/N/C, see datasheet |
| Pin 2 | RP14/RA15 — Remappable pin/Port A15 |
| Pin 3 | RP13/PMA0/RA4 — Remappable/Parallel Master Address 0/Port A4 |
| Pin 4 | RP12/PMA1/RA13 — Remappable/Parallel Master Address 1/Port A13 |
| Pin 5 | RP11/PMA2/RC13 — Remappable/Parallel Master Address 2/Port C13 |
| Pin 6 | RP10/PMA3/RC14 — Remappable/Parallel Master Address 3/Port C14 |
| Pin 7 | RP9/C1OUT/PMA4/SDI1/RC15 — Remappable/Comparator 1 output/PMA4/SPI1 data in/Port C15 |
| Pin 8 | RP8/PMA5/RA14 — Remappable/Parallel Master Address 5/Port A14 |
| Pin 9 | MCLR — Master Clear (reset) input, drive low for reset |
| Pin 10 | RP7/RA10 — Remappable/Port A10 |
| Pin 11 | RP6/RA9 — Remappable/Port A9 |
| Pin 12 | RP5/IC5/PMA6/RA8 — Remappable/Input Capture 5/Parallel Master Address 6/Port A8 |
| Pin 13 | RP4/IC4/PMA7/RB15 — Remappable/Input Capture 4/Parallel Master Address 7/Port B15 |
| Pin 14 | RP3/RA7 — Remappable/Port A7 |
| Pin 15 | RP2/SDA2/RA6 — Remappable/I2C2 data/Port A6 |
| Pin 16 | RP1/SCL2/RA5 — Remappable/I2C2 clock/Port A5 |
| Pin 17 | RP0/INT0/RB14 — Remappable/External Interrupt 0/Port B14 |
| Pin 18 | AVDD — Analog supply (tie to VDD or filtered supply) |
| Pin 19 | AVSS — Analog ground reference |
| Pin 20 | VDD — Digital supply (3.0 V to 3.6 V) |
| Pin 21 | VSS — Digital ground |
Typical Applications
DSPIC33FJ128MC710A-E/PT is suitable for 7 applications: BLDC and PMSM Field-Oriented Control, AC Induction Motor VFD Control, Switched Reluctance Motor Drive, Uninterruptible Power Supply (UPS) Inverter, Industrial Servo and Positioning Drives, Automotive 12V Auxiliary Motor Modules, Solar Micro-Inverter and MPPT Optimizer.
BLDC and PMSM Field-Oriented Control
Drives a three-phase BLDC or PMSM in sensored or sensorless FOC topology. The DSPIC33FJ128MC710A-E/PT's 40 MIPS DSP engine executes Park/Clarke transforms within a microsecond loop, while the dedicated motor-control PWM module generates complementary 8-output pairs with programmable dead time. Reference firmware AN1078 implements sensorless FOC on this device; the on-chip 10/12-bit ADC synchronized to the PWM edge eliminates jitter on current sampling. We recommend pairing the 710A with the MCP8026 gate driver and Microchip's 100 V MOSFETs for an integrated 1 kW inverter stage.
Recommended
AC Induction Motor VFD Control
Implements indirect field-oriented control (IFOC) for a three-phase induction motor drive. The DSPIC33FJ128MC710A-E/PT handles the slip calculation, indirect rotor flux estimator, and SVPWM entirely on-chip, removing the need for an external DSP. ECAN connectivity supports CANopen or J1939 industrial networks. The 8 DMA channels offload ADC double-buffering from the CPU, leaving headroom for HMI and current-loop interrupt service routines. Storing lookup tables for rotor-flux estimator within the 128 KB Flash avoids runtime calculation latency.
Recommended
Switched Reluctance Motor Drive
Executes a switched reluctance motor (SRM) commutation control loop with the DSPIC33FJ128MC710A-E/PT as the master controller. The high-resolution PWM and edge-triggered ADC convert Hall or shunt current signals into rotor-position estimation, while eight DMA streams keep feedback pipelines full without interrupting core loops. The 3.3V rail fits direct digital control of buck-derived gate-drive bias; the -40 C to +125 C /E grade ensures operation in harsh industrial enclosures.
Recommended
Uninterruptible Power Supply (UPS) Inverter
Controls a single-phase or three-phase UPS inverter in real time. The DSPIC33FJ128MC710A-E/PT supports sinusoidal PWM generation, battery-state Kalman filtering, and sinusoidal-synthesized output with sub-percent THD. With 128 KB Flash you can include both grid-tie and islanded-mode firmware images in a single MCU, enabling firmware-over-the-air updates via ECAN. The integrated quadrature decoder accepts external frequency references for synchronization to grid zero-crossing.
Recommended
Industrial Servo and Positioning Drives
Builds a digital servo loop with the DSPIC33FJ128MC710A-E/PT as the central processor, reading quadrature encoders and driving a PWM-driven H-bridge. The 9 timers support position, velocity, and acceleration sample rates on independent clocks while the 8-channel DMA streams encoder data into a circular buffer. CANopen over ECAN enables integration into multi-axis factory automation buses. The 100-TQFP package exposes the full peripheral set needed for synchronized multi-axis control on a single MCU.
Recommended
Automotive 12V Auxiliary Motor Modules
Drives 12V automotive auxiliary pumps and fans such as coolant pumps, oil pumps, HVAC blowers, and electronic throttle controls. While the DSPIC33FJ128MC710A-E/PT itself is industrial-grade (-40 C to +125 C), firmware proven on this MCU can be ported to the AEC-Q100 automotive variant of the dsPIC33F family. Hardware peripherals such as the dedicated motor-control PWM, the 12-bit ADC, and ECAN are reused directly from this platform, accelerating the design-port process.
Recommended
Solar Micro-Inverter and MPPT Optimizer
Combines MPPT perturb-and-observe control and a high-frequency DC-AC converter inside a single dsPIC chip. The DSPIC33FJ128MC710A-E/PT runs the perturb-and-observe MPPT loop at kHz rates, drives a high-frequency transformer inverter through PWMs, and synchronizes to the 50/60 Hz grid via ECAN/PLL. The 128 KB Flash accommodates multiple firmware images (commissioning, normal-mode, fault-mode) without external storage.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33FJ128MC710A-E/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33FJ128MC510A-I/PF | DSPIC33FJ128MC510A-E/PT | DSPIC33FJ128MC710ATH/PT | DSPIC33FJ128MC510A-I/PT | DSPIC33FJ128MC506A-E/PT |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 100-TQFP (12x12 mm) | 100-TQFP (12x12 mm) - same | 100-TQFP (12x12 mm) - same | 100-TQFP (12x12 mm) - same | 100-TQFP (12x12 mm) - same | 100-TQFP (12x12 mm) - same |
| Program Memory (Flash) | 128 KB | 64 KB | 64 KB | 128 KB | 64 KB | 128 KB |
| CPU Speed | 40 MIPS (40 MHz) | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS |
| Operating Temperature | -40 C to +125 C (Extended) | -40 C to +85 C (Industrial) | -40 C to +125 C (Extended) | -40 C to +125 C (Extended) | -40 C to +85 C (Industrial) | -40 C to +125 C (Extended) |
| CAN Module | ECAN | ECAN | ECAN | ECAN | ECAN | ECAN |
| Motor Control PWM | Yes, 8-output pair | Yes, 8-output pair | Yes, 8-output pair | Yes, 8-output pair | Yes, 8-output pair | Yes, 8-output pair |
Key Differentiators
- Largest Flash density in the 100-pin TQFP 33F family (vs DSPIC33FJ128MC510A-I/PF)
- Identical die to TH variant - clean second-source path (vs DSPIC33FJ128MC710ATH/PT)
- Extended-temperature grade for industrial enclosures (vs DSPIC33FJ128MC510A-I/PT)
Design Notes
Tie AVDD to the same 3.3 V supply as VDD through a ferrite bead with 10 uF and 100 nF decoupling placed within 5 mm of the AVDD pin; add a single shared bulk capacitor of at least 47 uF on the supply rails. This isolation filters switching noise from the digital logic so the 10/12-bit ADC sees a clean analog rail. Avoid routing high-dV/dt PWM traces near AVDD traces on the top layer to keep ADC SNR within datasheet spec.
Place the 4-pin oscillator network within 2 cm of the OSC1/OSC2 pins and guard the traces with a GND ring to prevent PWM ripple from injecting into the system clock. Use a 4-layer PCB with a continuous ground plane to reduce EMI; route motor phase traces symmetrically to keep phase inductance matched. Keep PW<->feedback loop trace lengths matched for the ADC current sense resistors.
Do not skip configuration of the FPOR (Flash Partition) bits during boot - failing to do so can leave unused Flash areas unsecured, allowing accidental code execution from an uninitialized region. Enable the JTAG Debug Bit (DEBUG_OFF) in the IEC0/JTAGEN register only after firmware is finalized, otherwise debug-capable tools may access internal Flash. Never configure the PWM in complementary mode without setting the proper dead-time compensation or you risk shoot-through on the half-bridge.
When using the dsPIC33F's ECAN module at 1 Mbit/s, place a CAN bus transceiver such as MCP2551 with 120 ohm terminating resistors on both ends of the bus; ground the transceiver ground pin with a short connection to the PCB ground plane. Avoid T-junctions; use a single daisy-chain topology. Shield twisted-pair wiring with the shield grounded at one point to reduce emissions.
Compliance Information
RoHS compliant per Microchip product page. -E/PT is industrial Extended grade and is NOT AEC-Q100 qualified; the separate -VAO suffix variant is AEC-Q100 automotive-grade. Halogen-free status not explicitly listed in provided source data.
