DSPIC33FJ128MC506A-E/PT - 16-bit 40MIPS 128KB Flash DSC | Microchip
MPN: DSPIC33FJ128MC506A-E/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $8.97 | $8.97 |
| 10 | $8.52 | $85.20 |
| 25 | $8.21 | $205.25 |
| 100 | $7.58 | $758.00 |
| 1,000 | $6.9 | $6,900.00 |
DSPIC33FJ128MC506A-E/PT Overview
A digital signal controller combines the compute power of a DSP engine with the peripheral set and ease of use of a microcontroller. Within the power-management hierarchy, the dsPIC33FJ family sits alongside general-purpose MCUs and dedicated DSPs, targeting closed-loop control systems such as motor drives and digital power conversion where hardware multiply-accumulate and fast interrupt response matter.
Key features include a 16-bit modified Harvard architecture core running at 40 MIPS, 128 KB self-programmable Flash, 8 KB SRAM, and a motor-control PWM peripheral suited to brushless DC, single- and 3-phase induction, and switched reluctance motors. The device also integrates CAN 2.0B communication, serial ports (UART, SPI, I2C), 8 DMA channels, 11 timers, and 53 general-purpose I/O pins.
Technically, the A-variant revision of the dsPIC33FJ128MC506 family adds an enhanced analog and peripheral set with the ECAN module, enabling deterministic in-vehicle or industrial networking alongside deterministic control loops. The DSP engine supports single-cycle MAC and hardware division, while DMA offloads the core during high-rate ADC and PWM update loops.
Typical applications include brushless DC motor drives, industrial inverters and UPS systems, digital power supplies, and automotive-adjacent control nodes requiring AEC-Q100-style extended temperature coverage. The CAN interface and rich timer resources make it a strong fit for UniFI/fieldbus-connected drives.
Design consideration: the core is supplied from a 3.0V to 3.6V rail, so level shifting is required for 5V peripherals, and the internal regulator requires proper decoupling per the manufacturer datasheet layout guidance.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
Drop-in alternatives for DSPIC33FJ128MC506A-E/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33FJ128MC506A-E/PT (same form factor and footprint) — differing in Operating Temperature, Package, Core, Core Architecture, Qualification.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33FJ128MC506A-I/PT
✅ Drop-In✓ In Stock
$3.2 / Unit
View Datasheet →DSPIC33FJ128MC506
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33FJ256MC506A
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33FJ64MC506A
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33FJ128MC706A
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33FJ128GP706A-E/PT
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$5.9 / Unit
View Datasheet →DSPIC33FJ128MC506A-E/PT Maximum Ratings & Electrical Characteristics
| Core Architecture | 16-bit dsPIC33F DSC (CMOS) |
| Maximum CPU Speed | 40 MIPS (40 MHz core clock) |
| Program Memory | 128 KB (128K x 8) Flash |
| RAM | 8 KB (8K x 8) |
| Supply Voltage | 3 V to 3.6 V |
| Operating Temperature | -40C to +125C (Extended, E grade) |
| Package | 64-TQFP (10x10 mm) |
| I/O Pins | 53 |
| DMA Channels | 8 |
| Timers | 11 |
| Serial Interfaces | 4 serial I/O ports (UART, SPI, I2C) |
| External Interrupt Sources | 5 |
| CAN | ECAN, CAN 2.0B |
| Motor Control Peripherals | Motor Control PWM (BLDC, induction, switched reluctance) |
| Mounting Type | Surface Mount |
| Qualification | AEC-Q100 (per distributor datasheet listing) |
DSPIC33FJ128MC506A-E/PT Pin Configuration
| Pin 1 | MCLR — Master clear reset input |
| Pin 2 | AN0/VREF+/CN3/RB0 — Analog input 0 / positive voltage reference |
| Pin 3 | AN1/VREF-/CN2/RB1 — Analog input 1 / negative voltage reference |
| Pin 4 | AN2/SS1/CN4/RB2 — Analog input 2 / SPI1 slave select |
| Pin 5 | AN3/INDX/CN5/RB3 — Analog input 3 / encoder index |
| Pin 6 | AN4/QEA/IC7/CN6/RB4 — Analog input 4 / encoder phase A |
| Pin 7 | AN5/QEB/IC8/CN7/RB5 — Analog input 5 / encoder phase B |
| Pin 8 | AN6/OCFA/RB6 — Analog input 6 / PWM fault A |
| Pin 9 | AN7/UPDN/RB7 — Analog input 7 / counter up-down |
| Pin 10 | AN8/RP15/PMCS1/RB8 — Analog input 8 / remappable pin RP15 |
| Pin 11 | AN9/RP14/PMCS2/RB9 — Analog input 9 / remappable pin RP14 |
| Pin 12 | AN10/RP13/RTCC/RB10 — Analog input 10 / RTCC alarm |
| Pin 13 | AN11/RP12/PMWR/RB11 — Analog input 11 / remappable pin RP12 |
| Pin 14 | VSS — Ground reference |
| Pin 15 | VDD — Power supply (3.0V-3.6V) |
| Pin 16 | TMS/RP11/RB12 — JTAG test mode select |
| Pin 17 | TDI/RP10/RB13 — JTAG test data in |
| Pin 18 | TDO/RP9/RB14 — JTAG test data out |
| Pin 19 | TCK/RP8/RB15 — JTAG test clock |
| Pin 20 | VDD — Power supply |
| Pin 21 | OSC1/CLKI/RC12 — Oscillator input / external clock in |
| Pin 22 | OSC2/CLKO/RC15 — Oscillator output / clock out |
| Pin 23 | VSS — Ground reference |
| Pin 24 | SOSCI/CN1/RC13 — Secondary oscillator input |
| Pin 25 | SOSCO/T1CK/CN0/RA4 — Secondary oscillator output / Timer1 clock |
| Pin 26 | SCL/RG2 — I2C clock |
| Pin 27 | SDA/RG3 — I2C data |
| Pin 28 | INT0/RD0 — External interrupt 0 |
| Pin 29 | RD1 — General purpose I/O port D |
| Pin 30 | RD2 — General purpose I/O port D |
| Pin 31 | RD3 — General purpose I/O port D |
| Pin 32 | RD4 — General purpose I/O port D |
| Pin 33 | VDD — Power supply |
| Pin 34 | RD5 — General purpose I/O port D |
| Pin 35 | RD6 — General purpose I/O port D |
| Pin 36 | RD7 — General purpose I/O port D |
| Pin 37 | SCK2/RG6 — SPI2 clock |
| Pin 38 | SDI2/RG7 — SPI2 data in |
| Pin 39 | SDO2/RG8 — SPI2 data out |
| Pin 40 | SS2/CN10/RG9 — SPI2 slave select |
| Pin 41 | VSS — Ground reference |
| Pin 42 | RF12 — General purpose I/O port F (UART alt.) |
| Pin 43 | RF13 — General purpose I/O port F (UART alt.) |
| Pin 44 | SCK1/RF6 — SPI1 clock |
| Pin 45 | SDI1/RF7 — SPI1 data in |
| Pin 46 | SDO1/RF8 — SPI1 data out |
| Pin 47 | SS1/RF2 — SPI1 slave select |
| Pin 48 | U1TX/RF3 — UART1 transmit |
| Pin 49 | U1RX/RF2 — UART1 receive |
| Pin 50 | PWM1L1/RF4 — Motor control PWM 1 low / I/O |
| Pin 51 | PWM1H1/RF5 — Motor control PWM 1 high / I/O |
| Pin 52 | VDD — Power supply |
| Pin 53 | PWM1L2/RF0 — Motor control PWM 1 low / I/O |
| Pin 54 | PWM1H2/RF1 — Motor control PWM 1 high / I/O |
| Pin 55 | PWM2L1/RD8 — Motor control PWM 2 low / I/O |
| Pin 56 | PWM2H1/RD9 — Motor control PWM 2 high / I/O |
| Pin 57 | PWM2L2/RD10 — Motor control PWM 2 low / I/O |
| Pin 58 | PWM2H2/RD11 — Motor control PWM 2 high / I/O |
| Pin 59 | AVDD — Analog power supply |
| Pin 60 | AVSS — Analog ground |
| Pin 61 | PWM3L1/RD12 — Motor control PWM 3 low / I/O |
| Pin 62 | PWM3H1/RD13 — Motor control PWM 3 high / I/O |
| Pin 63 | PWM3L2/RD14 — Motor control PWM 3 low / I/O |
| Pin 64 | PWM3H2/RD15 — Motor control PWM 3 high / I/O |
Typical Applications
DSPIC33FJ128MC506A-E/PT is suitable for 6 applications: Brushless DC Motor Drives, Industrial Inverters and UPS, Digital Power Supplies, Automotive-Adjacent Control Nodes, Factory Automation and Robotics, Embedded Systems Education and Prototyping.
Brushless DC Motor Drives
The DSPIC33FJ128MC506A-E/PT fits brushless DC (BLDC) motor control because its 40 MIPS DSP core executes commutation and current-loop algorithms with deterministic latency, while the dedicated motor-control PWM peripheral generates complementary PWM pairs with programmable dead time. Microchip explicitly positions this family for BLDC, induction, and switched reluctance motors. In a typical three-phase BLDC inverter, the DSC reads Hall sensors or computes sensorless back-EMF on its ADC inputs, updates the PWM duty cycle within one control cycle, and reports status over ECAN. The 8 DMA channels move ADC results to RAM without core intervention, keeping interrupt overhead low. Compared with a generic MCU, the single-cycle MAC accelerates field-oriented control math measurably.
Recommended
Industrial Inverters and UPS
Single- and 3-phase induction motor drives and uninterruptible power supplies benefit from the DSPIC33FJ128MC506A-E/PT's combination of 40 MIPS control bandwidth, 11 timers, and ECAN networking. The motor-control PWM outputs drive the inverter bridge while the ADC samples DC-bus voltage and phase currents for voltage/frequency or vector control algorithms. The extended -40C to +125C temperature rating covers industrial cabinets with limited forced-air cooling, and CAN 2.0B connectivity integrates the drive into factory fieldbus networks. The 128 KB Flash leaves headroom for protocol stacks such as CANopen on top of the control firmware. Designers should budget the 3.0V-3.6V supply rail and isolate the CAN transceiver from the power stage for robust noise immunity.
Recommended
Digital Power Supplies
Switch-mode power supplies and DC-DC converters with digital control loops use the DSPIC33FJ128MC506A-E/PT's fast ADC, DMA, and PWM peripherals to close voltage and current loops at switching frequencies in the tens of kilohertz and beyond. The 40 MIPS core executes compensator mathematics - proportional-integral or more advanced 2p2z structures - with single-cycle MAC operations, while DMA streams conversion results so the core is never stalled. ECAN allows digital power supplies in telecom or server racks to report telemetry and accept setpoint commands. The 53 I/O pins support auxiliary housekeeping functions such as fan control, sequencing, and fault latching on one die, reducing bill-of-material count versus a discrete controller plus supervisor approach.
Recommended
Automotive-Adjacent Control Nodes
Although designers must confirm qualification level per build, the DSPIC33FJ128MC506A-E/PT is listed by distributors with AEC-Q100-style qualification data and offers the extended -40C to +125C range typical of under-hood-adjacent modules. The ECAN module implements CAN 2.0B for in-vehicle networking, and the 40 MIPS core handles pump, fan, and actuator motor control with room for diagnostic routines. The 128 KB Flash accommodates UDS/KWP-style service layers alongside the control application. When integrating near 5V automotive transients, add proper TVS protection on the CAN lines and regulator front end, and observe the 3.0V-3.6V supply tolerance in the power tree. Microchip's long-term availability commitments support multi-year automotive-adjacent programs.
Recommended
Factory Automation and Robotics
Servo drives, conveyors, and robotic joints in factory automation require coordinated multi-axis motion and deterministic communication, both served by the DSPIC33FJ128MC506A-E/PT. Its motor-control PWM generates the six switching signals per axis with hardware dead-time insertion, while quadrature encoder interface inputs (QEA/QEB pins) close the position loop at 40 MIPS processing speed. Five external interrupt sources and 11 timers support limit switches, homing sensors, and synchronized sampling across axes. ECAN links each axis controller into a distributed CAN-based motion network. With 53 I/O pins, one DSC commonly handles an entire single-axis smart drive including safety interlocks and status LEDs, replacing a microcontroller plus CPLD combination and shortening firmware development with Microchip's motor-control libraries.
Recommended
Embedded Systems Education and Prototyping
The dsPIC33FJ128MC506A family is a common teaching platform for 16-bit embedded control and digital signal processing courses, supported by Microchip's Explorer 16/32 Development Board, which accepts dsPIC Plug-In Modules (PIMs) for easy device swapping alongside PIC24F and PIC32 families. Students gain exposure to DSP engine instructions, DMA, CAN, and motor-control peripherals on one inexpensive chip with free MPLAB X tooling. The 64-TQFP package on a breakout board is hand-solderable for lab prototypes, and the 3.3V single-supply requirement simplifies bench setups. Because the E/PT grade tolerates -40C to +125C, the same curriculum hardware also serves senior capstone projects involving thermal or motor test rigs where industrial-grade parts are appropriate.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33FJ128MC506A-E/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33FJ128MC506A-I/PT | DSPIC33FJ256MC506A | DSPIC33FJ64MC506A | DSPIC33FJ128GP706A-E/PT |
|---|---|---|---|---|---|
| Package | 64-TQFP (10x10 mm) | 64-TQFP (10x10 mm) - same | 64-TQFP (10x10 mm) - same | 64-TQFP (10x10 mm) - same | 64-TQFP (10x10 mm) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| CPU Speed | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS |
| Flash Memory | 128 KB | 128 KB | 256 KB | 64 KB | 128 KB |
| Motor Control PWM | Yes | Yes | Yes | Yes | No (GP family) |
| CAN (ECAN) | Yes, CAN 2.0B | Yes, CAN 2.0B | Yes, CAN 2.0B | Yes, CAN 2.0B | Yes, CAN 2.0B |
Key Differentiators
- Extended -40C to +125C operation at standard-variant pricing (vs DSPIC33FJ128MC506A-I/PT)
- Double the program memory of the 64 KB class sibling (vs DSPIC33FJ64MC506A)
- Motor-control peripheral set absent from GP-family twins (vs DSPIC33FJ128GP706A-E/PT)
Design Notes
Supply the DSPIC33FJ128MC506A-E/PT from a clean 3.0V-3.6V rail; exceeding 3.6V on VDD stresses the core regulator and I/O structures. Place a 0.1uF ceramic capacitor at each VDD pin pair (pins 15/20, 33, 52) plus bulk 10uF near pin 15. Keep AVDD (pin 59) fed through an RC filter (e.g., ferrite bead plus 10uF + 0.1uF) from the digital rail to protect ADC accuracy. Decouple VDDCORE per the internal regulator guidance in the manufacturer datasheet - do not omit these capacitors or the device will not start.
For motor-control layouts, route the six PWM outputs (pins 50-51, 53-54, 55-58, 61-64) away from the analog inputs AN0-AN13 on the RB port to prevent switching transients from corrupting current-sense samples. Use a solid ground plane, connect AVSS (pin 60) to the analog ground island at a single point, and keep the crystal circuit (OSC1/OSC2, pins 21-22) with short traces and guard grounding. This layout discipline is the difference between clean 12-bit-class current sampling and noisy feedback on a typical inverter PCB.
Three recurring mistakes with this device: (1) assuming 5V-tolerant I/O - the 53 I/O pins are 3.3V only, so level-shift any 5V sensor or legacy peripheral; (2) mismatching temperature grade - the -E/PT part is required for ambients above +85C, the -I/PT version will not survive the full industrial cabinet range; (3) upgrading from non-A to A-revision silicon without reviewing the respective errata sheets - peripheral behavior on early non-A parts differs in documented cases. Always confirm the exact ordering code on incoming reel labels during incoming inspection.
Compliance Information
Distributor datasheet listing (datasheets.globalspec.com) states AEC-Q100 qualification for the TQFP-64 product. RoHS/REACH/lead-free status was not explicitly stated in the provided verified data for this exact ordering code - confirm via Microchip's product page compliance documents.
