DSPIC33FJ128MC710A-I - 16-bit DSC, 128KB Flash, Motor Control | Microchip
MPN: DSPIC33FJ128MC710A-I ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $9.85 | $9.85 |
| 10 | $8.74 | $87.40 |
| 100 | $7.62 | $762.00 |
| 500 | $6.93 | $3,465.00 |
| 1,000 | $6.21 | $6,210.00 |
DSPIC33FJ128MC710A-I Overview
A Digital Signal Controller is a hybrid MCU/DSP device that combines the deterministic interrupt response and peripheral set of a microcontroller with the single-cycle MAC, barrel shifter, and zero-overhead loop capabilities of a DSP. The dsPIC33F family in particular targets motor control and digital power conversion, sitting in the hierarchy: DSC -> MCU -> embedded processor -> semiconductor. Its DSP engine executes instructions at 40 MIPS from a 3.0 V to 3.6 V supply, while integrated motor-control PWM, quadrature encoder interface, and high-speed ADC enable closed-loop field-oriented control (FOC) of brushless DC, PMSM, AC induction, and switched-reluctance motors without external coprocessors.
Key features of the DSPIC33FJ128MC710A-I include a 16-bit DSC core running up to 40 MIPS, 128 KB Flash program memory, 16 KB SRAM data memory, an 8-channel hardware motor-control PWM module with up to 16-bit resolution and complementary outputs with programmable dead time, a 10-bit ADC with up to 1.1 Msps and up to 32 input channels, two UART, two SPI, one I2C, two CAN modules, a quadrature encoder interface, and an ECAN peripheral for industrial networking. The device also integrates a 32-bit RTCC, five 16-bit timers, and a Parallel Master Port for external memory expansion.
Architecturally, the DSPIC33FJ128MC710A uses a modified Harvard architecture with separate program and data buses, a 24-bit instruction word, and a single-cycle 16x16 MAC with 40-bit accumulator. The MCU side supplies deterministic interrupt latency, an 8-deep shadow register set for fast context save/restore, and a peripheral engine that triggers PWM, ADC, and DMA without CPU intervention. The result is a closed-loop PWM update rate suitable for high-speed FOC, with deterministic ADC-to-PWM phase alignment for sensorless control schemes.
Typical applications include field-oriented control of three-phase PMSM/BLDC motors, sensorless and sensored AC induction motor drives, switched-reluctance motor controllers, industrial servo drives, solar micro-inverters, and uninterruptible power supply (UPS) front-end converters. The integrated CAN and ECAN peripherals also make the device suitable for industrial automation nodes communicating over CANopen or DeviceNet.
When designing with this part, careful PCB layout of the analog ground island, ADC reference decoupling, and PWM-to-phase output routing is essential to achieve the rated ADC SNR. Select the external MOSFET gate driver based on the PWM module's 3.3 V logic level and ensure dead-time insertion is enabled to prevent shoot-through in the half-bridge.
This page consolidates distributor pricing, drop-in and same-family package-compatible alternatives, and practical design notes not found in a single manufacturer datasheet, supporting both initial selection and BOM risk management for the dsPIC33FJ128MC710A-I.
Drop-in alternatives for DSPIC33FJ128MC710A-I — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33FJ128MC710A-I (same form factor and footprint) — differing in Package, ADC, Core Architecture, Operating Temperature, Maximum CPU Speed.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33FJ128MC710AT-I/PT
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33FJ128MC708A-I/PT
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33FJ128MC706A-I/PT
✅ Drop-In✓ In Stock
$5.2 / Unit
View Datasheet →DSPIC33FJ256MC710A-I/PT
✅ Drop-In✓ In Stock
$7.8 / Unit
View Datasheet →DSPIC33FJ128MC510A-I/PF
✅ Drop-In✓ In Stock
$8.1 / Unit
View Datasheet →DSPIC33FJ128GP710A-I/PF
✅ Drop-In✓ In Stock
$8.9 / Unit
View Datasheet →DSPIC33FJ128MC710A-I Maximum Ratings & Electrical Characteristics
| Core Architecture | 16-bit dsPIC33F DSC (modified Harvard) |
| Maximum CPU Speed | 40 MIPS (80 MHz oscillator, 2:1 FRC postscaler) |
| Program Flash Memory | 128 KB |
| Data RAM | 16 KB |
| Operating Voltage (VDD) | 3.0 V to 3.6 V |
| Operating Temperature Range | -40 C to +85 C (Industrial 'I' grade) |
| Package | 100-pin TQFP (PT suffix) 12x12 mm |
| Motor Control PWM | 8 output channels, 16-bit resolution, complementary outputs with dead-time |
| ADC | 10-bit, up to 1.1 Msps, up to 32 input channels |
| CAN Modules | 2x ECAN (Enhanced CAN 2.0B) |
| UART | 2 channels |
| SPI | 2 channels |
| I2C | 1 channel |
| Quadrature Encoder Interface (QEI) | Yes, 1 module |
| Parallel Master Port (PMP) | Yes (external memory interface) |
| Timers | 5 x 16-bit, plus 32-bit RTCC |
| DMA Channels | 8 channels |
| RoHS Status | Compliant |
DSPIC33FJ128MC710A-I Pin Configuration
| Pin 1 | PWM1L — PWM channel 1 low-side output |
| Pin 2 | PWM1H — PWM channel 1 high-side output |
| Pin 3 | PWM2L — PWM channel 2 low-side output |
| Pin 4 | PWM2H — PWM channel 2 high-side output |
| Pin 5 | PWM3L — PWM channel 3 low-side output |
| Pin 6 | PWM3H — PWM channel 3 high-side output |
| Pin 7 | PWM4L — PWM channel 4 low-side output |
| Pin 8 | PWM4H — PWM channel 4 high-side output |
| Pin 9 | FLTA — PWM Fault A input |
| Pin 10 | PWM5L — PWM channel 5 low-side output (or GPIO) |
| Pin 11 | PWM5H — PWM channel 5 high-side output (or GPIO) |
| Pin 12 | PWM6L — PWM channel 6 low-side output (or GPIO) |
| Pin 13 | AN0 — ADC analog input 0 |
| Pin 14 | AN1 — ADC analog input 1 |
| Pin 15 | AN2 — ADC analog input 2 |
| Pin 16 | AN3 — ADC analog input 3 |
| Pin 17 | AN4 — ADC analog input 4 |
| Pin 18 | AN5 — ADC analog input 5 |
| Pin 19 | AVSS — Analog ground |
| Pin 20 | AVDD — Analog supply (3.3 V) |
| Pin 21 | VREF+ — ADC positive reference voltage input |
| Pin 22 | VREF- — ADC negative reference voltage input |
| Pin 23 | AN6 — ADC analog input 6 |
| Pin 24 | AN7 — ADC analog input 7 |
| Pin 25 | AN8 — ADC analog input 8 |
| Pin 26 | PGEC1 — ICSP programming clock 1 |
| Pin 27 | PGED1 — ICSP programming data 1 |
| Pin 28 | PGEC2 — ICSP programming clock 2 (alternate) |
| Pin 29 | PGED2 — ICSP programming data 2 (alternate) |
| Pin 30 | MCLR — Master Clear (reset) input |
| Pin 31 | OSC1 — Crystal oscillator input |
| Pin 32 | OSC2 — Crystal oscillator output |
| Pin 33 | RA0 — Port A bit 0 (GPIO) |
| Pin 34 | RA1 — Port A bit 1 (GPIO) |
| Pin 35 | RA2 — Port A bit 2 (GPIO) |
| Pin 36 | RA3 — Port A bit 3 (GPIO) |
| Pin 37 | RA4 — Port A bit 4 (GPIO) |
| Pin 38 | RA5 — Port A bit 5 (GPIO) |
| Pin 39 | RA6 — Port A bit 6 (GPIO) |
| Pin 40 | RA7 — Port A bit 7 (GPIO) |
| Pin 41 | VDD — Digital supply (3.3 V) |
| Pin 42 | VSS — Digital ground |
| Pin 43 | RB0 — Port B bit 0 (GPIO / CN interrupt) |
| Pin 44 | RB1 — Port B bit 1 (GPIO / CN interrupt) |
| Pin 45 | RB2 — Port B bit 2 (GPIO / CN interrupt) |
| Pin 46 | RB3 — Port B bit 3 (GPIO / CN interrupt) |
| Pin 47 | RB4 — Port B bit 4 (GPIO / CN interrupt) |
| Pin 48 | RB5 — Port B bit 5 (GPIO / CN interrupt) |
| Pin 49 | RB6 — Port B bit 6 (GPIO / CN interrupt / ICSP) |
| Pin 50 | RB7 — Port B bit 7 (GPIO / CN interrupt / ICSP) |
| Pin 51 | RC1 — Port C bit 1 (GPIO / CAN RX) |
| Pin 52 | RC2 — Port C bit 2 (GPIO / CAN TX) |
| Pin 53 | RC3 — Port C bit 3 (GPIO / SPI SCK) |
| Pin 54 | RC4 — Port C bit 4 (GPIO / SPI SDI) |
| Pin 55 | RD0 — Port D bit 0 (GPIO / PMP data) |
| Pin 56 | RD1 — Port D bit 1 (GPIO / PMP data) |
| Pin 57 | RD2 — Port D bit 2 (GPIO / PMP data) |
| Pin 58 | RD3 — Port D bit 3 (GPIO / PMP data) |
| Pin 59 | RD4 — Port D bit 4 (GPIO / PMP data) |
| Pin 60 | RD5 — Port D bit 5 (GPIO / PMP data) |
| Pin 61 | RD6 — Port D bit 6 (GPIO / PMP data) |
| Pin 62 | RD7 — Port D bit 7 (GPIO / PMP data) |
| Pin 63 | RE0 — Port E bit 0 (GPIO / PMP control) |
| Pin 64 | RE1 — Port E bit 1 (GPIO / PMP control) |
| Pin 65 | RE2 — Port E bit 2 (GPIO / PMP control) |
| Pin 66 | RE3 — Port E bit 3 (GPIO / PMP control) |
| Pin 67 | RE4 — Port E bit 4 (GPIO / PMP control) |
| Pin 68 | RE5 — Port E bit 5 (GPIO / PMP control) |
| Pin 69 | RE6 — Port E bit 6 (GPIO / PMP control) |
| Pin 70 | RE7 — Port E bit 7 (GPIO / PMP control) |
| Pin 71 | RF0 — Port F bit 0 (GPIO / QEI index) |
| Pin 72 | RF1 — Port F bit 1 (GPIO / QEI phase A) |
| Pin 73 | RF2 — Port F bit 2 (GPIO / QEI phase B) |
| Pin 74 | RF3 — Port F bit 3 (GPIO) |
| Pin 75 | RF4 — Port F bit 4 (GPIO) |
| Pin 76 | RF5 — Port F bit 5 (GPIO) |
| Pin 77 | RF6 — Port F bit 6 (GPIO) |
| Pin 78 | RF7 — Port F bit 7 (GPIO) |
| Pin 79 | RG0 — Port G bit 0 (GPIO) |
| Pin 80 | RG1 — Port G bit 1 (GPIO) |
| Pin 81 | RG2 — Port G bit 2 (GPIO / external interrupt) |
| Pin 82 | RG3 — Port G bit 3 (GPIO / external interrupt) |
| Pin 83 | RG6 — Port G bit 6 (GPIO) |
| Pin 84 | RG7 — Port G bit 7 (GPIO) |
| Pin 85 | RG8 — Port G bit 8 (GPIO) |
| Pin 86 | RG9 — Port G bit 9 (GPIO) |
| Pin 87 | VDD — Digital supply (3.3 V) |
| Pin 88 | VSS — Digital ground |
| Pin 89 | SDA1 — I2C data (alternate) |
| Pin 90 | SCL1 — I2C clock (alternate) |
| Pin 91 | SDO1 — SPI 1 data out |
| Pin 92 | SDI1 — SPI 1 data in |
| Pin 93 | SCK1 — SPI 1 clock |
| Pin 94 | U1TX — UART 1 transmit |
| Pin 95 | U1RX — UART 1 receive |
| Pin 96 | U2TX — UART 2 transmit |
| Pin 97 | U2RX — UART 2 receive |
| Pin 98 | RTCC — 32 kHz crystal for RTCC |
| Pin 99 | VDD — Digital supply (3.3 V) |
| Pin 100 | VSS — Digital ground |
Typical Applications
DSPIC33FJ128MC710A-I is suitable for 6 applications: Three-Phase PMSM / BLDC Field-Oriented Control, Industrial Servo Drive with CANopen Fieldbus, Solar Micro-Inverter and Digital Power Conversion, Uninterruptible Power Supply (UPS) Front-End, Switched-Reluctance Motor (SRM) Controller, Industrial Automation Node with ECAN and SPI Sensors.
Three-Phase PMSM / BLDC Field-Oriented Control
The DSPIC33FJ128MC710A-I executes single-cycle 16x16 MAC and zero-overhead loops at 40 MIPS, making it ideal for closed-loop field-oriented control (FOC) of permanent-magnet synchronous and brushless DC motors. Its 8-channel motor-control PWM with 16-bit resolution and complementary outputs with programmable dead time generates the six space-vector modulated waveforms required for a three-phase inverter, while the dedicated Fault input shuts down the PWM within nanoseconds on over-current events. The dual-shunt ADC sampling at 1.1 Msps synchronizes to the PWM reload, enabling sub-microsecond current feedback. Typical designs pair the part with a 3-phase gate driver and 600 V IGBT or 100 V MOSFET bridge, achieving 50 kHz FOC update rates.
Recommended
Industrial Servo Drive with CANopen Fieldbus
The DSPIC33FJ128MC710A-I's dual ECAN 2.0B controllers with up to 1 Mbit/s, combined with 128 KB Flash for the CANopen stack and 16 KB RAM for PDO buffers, fit multi-axis industrial servo drives communicating over CANopen or DeviceNet. The QEI module directly reads incremental encoders without external counters, while the 32-bit RTCC schedules synchronized motion profiles. The 100-pin TQFP exposes all needed peripherals and tolerates the -40 C to +85 C industrial temperature range. Designs can store parameters in the upper Flash rows for in-field firmware updates via ECAN bootloaders.
Recommended
Solar Micro-Inverter and Digital Power Conversion
The DSPIC33FJ128MC710A-I delivers deterministic interrupt response and high-resolution PWM, suiting single-phase solar micro-inverter and PFC front-end designs. The 16-bit PWM with adjustable dead time drives a full H-bridge or totem-pole stage at 50-200 kHz with cycle-by-cycle current limiting. The 1.1 Msps ADC samples the inductor current and grid voltage synchronously to the PWM, supporting MPPT algorithms and grid-synchronization PLL in firmware. 128 KB Flash holds the control loop, MPPT state machine, and anti-islanding logic; 16 KB RAM is sufficient for the Park/Clarke buffers and grid-voltage PLL state. The 3.3 V logic outputs match most modern gate drivers.
Recommended
Uninterruptible Power Supply (UPS) Front-End
Online UPS topologies use a double-conversion front-end (PFC + inverter) where the DSPIC33FJ128MC710A-I manages both stages. The 8-channel PWM drives the PFC boost stage on four channels and the inverter H-bridge on four channels, while the high-speed ADC monitors input current, battery voltage, and output voltage simultaneously. The 128 KB Flash accommodates PFC PI controller tables, inverter sinusoidal PWM, battery charging profile, and LCD menu state machine. The on-chip Parallel Master Port allows connecting an external graphics LCD for local status display. Industrial temperature rating suits server-room and telecom rectifier environments.
Recommended
Switched-Reluctance Motor (SRM) Controller
The DSPIC33FJ128MC710A-I is well-suited for switched-reluctance motor control, where six or eight PWM channels drive independent phase windings without shoot-through risk because the rotor position determines the active phase. The dedicated motor-control PWM module with hardware dead-time insertion simplifies the asymmetric half-bridge commutation, while the QEI or Hall-sensor inputs provide rotor position feedback. 128 KB Flash holds the commutation lookup table and torque-sharing functions, and 16 KB RAM is sufficient for the commutation buffers. The dual CAN interfaces let the controller join vehicle CAN buses in traction applications.
Recommended
Industrial Automation Node with ECAN and SPI Sensors
The DSPIC33FJ128MC710A-I acts as a sensor hub in industrial automation: its 32 ADC inputs read temperature, pressure, and current sensors; its two SPI channels connect to digital sensors and isolated gate drivers; its two UART ports handle RS-485 modbus links; and its dual ECAN ports participate in CANopen fieldbus. 128 KB Flash accommodates protocol stacks plus application code, and the Parallel Master Port can drive an external character LCD. The industrial temperature range and the 100-pin TQFP's tolerance to conformal coating suit factory-floor enclosures with sustained 60-70 C ambient temperatures.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33FJ128MC710A-I — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33FJ128MC710AT-I/PT | DSPIC33FJ128MC708A-I/PT | DSPIC33FJ128MC706A-I/PT | DSPIC33FJ256MC710A-I/PT | DSPIC33FJ128MC510A-I/PF | DSPIC33FJ128GP710A-I/PF |
|---|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 100-pin TQFP (PT) 12x12 mm | 100-pin TQFP (PT) 12x12 mm - same | 100-pin TQFP (PT) 12x12 mm - same | 100-pin TQFP (PT) 12x12 mm - same | 100-pin TQFP (PT) 12x12 mm - same | 100-pin TQFP (PF) 14x14 mm - same pin count, larger body | 100-pin TQFP (PF) 14x14 mm - same pin count, larger body |
| Program Flash | 128 KB | 128 KB | 128 KB | 64 KB (-50%) | 256 KB (+100%) | 128 KB | 128 KB |
| Data SRAM | 16 KB | 16 KB | 16 KB | 8 KB (-50%) | 32 KB (+100%) | 8 KB | 16 KB |
| Maximum CPU Speed | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS |
| Motor Control PWM Channels | 8 (with dead time) | 8 (with dead time) | 8 (with dead time) | 6 (reduced PWM) | 8 (with dead time) | 6 | No dedicated motor-control PWM module |
| ECAN Controllers | 2 | 2 | 2 | 2 | 2 | 1 | 2 |
| QEI Module | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| Operating Temperature Range | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C |
Key Differentiators
- Largest Flash in the 100-pin TQFP dsPIC33F Motor Control family (vs DSPIC33FJ128MC706A-I/PT)
- Dual ECAN controllers for multi-axis fieldbus (vs DSPIC33FJ128MC510A-I/PF)
- Dedicated 8-channel motor-control PWM with hardware dead time (vs DSPIC33FJ128GP710A-I/PF)
Design Notes
Estimated: at maximum 40 MIPS and 3.3 V, the DSPIC33FJ128MC710A-I draws approximately 90 mA active core current; add 10-15 mA per ECAN port and 5-8 mA for the ADC when sampling. Place a 10 uF bulk + 100 nF high-frequency bypass pair adjacent to each VDD/VSS pin pair (pins 41/42, 87/88, 99/100), and a separate 10 uF + 100 nF pair on AVDD/AVSS (pins 19/20). Failing to do so risks ADC reference droop that shows up as periodic current-sense jitter in FOC.
Isolate the analog ground island (AVSS) from the digital ground (VSS) and join them only at a single point under the MCU. Route the ADC analog inputs (AN0-AN8) as far as possible from the PWM output traces, which switch 1-2 A/ns and couple capacitively into adjacent layers. Use a 4-layer PCB with the inner layer 2 as an uninterrupted ground plane; the 100-pin TQFP's 0.4 mm pitch is solderable with standard JEDEC IPC-7351 footprints without via-in-pad.
The DSPIC33FJ128MC710A-I is not 5 V tolerant; driving any digital input above 3.6 V or below VSS latches up the device. Level-shift UART/SPI signals to external 5 V peripherals with a 4-channel level shifter such as the TXS0108E. Also note that the 10-bit ADC requires software calibration after each VDD change; load the calibration constants from the factory-stored row in Flash at startup. Finally, the JTAG/ICSP programming pins PGEC1/PGED1 (pins 26/27) must be free of any external pull-up exceeding 10 kohm or programming will fail.
Estimated: at 3.3 V VDD x 90 mA core current = 297 mW active power dissipation; the 100-pin TQFP has theta_JA of approximately 45 C/W on a 4-layer JEDEC test board. Without forced airflow this yields about 13 C temperature rise above ambient, well within the industrial 85 C max. In sealed enclosures with 60 C ambient and the device running at full speed with both CAN ports active, allow at least 100 mm sq of exposed copper on the top layer above the exposed-pad-less TQFP body.
Compliance Information
RoHS and REACH compliant per Microchip product page; lead-free (Pb-free) reflow profile JEDEC J-STD-020. AEC-Q100 not applicable as no automotive qualified variants of this part number are published; check Microchip automotive catalog for AEC-Q100 equivalents.
