HI5746KCB - 10-Bit 40MSPS ADC, 28-SOIC | Renesas/Intersil
MPN: HI5746KCB ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $9.8 | $9.80 |
| 10 | $8.9 | $89.00 |
| 100 | $7.4 | $740.00 |
| 500 | $6.2 | $3,100.00 |
| 1,000 | $5.3 | $5,300.00 |
HI5746KCB Overview
An ADC (analog-to-digital converter) is a mixed-signal integrated circuit that converts continuous analog voltages into discrete digital codes at a defined sample rate. Within the broader taxonomy, the HI5746KCB is a pipelined successive-approximation-style ADC -> data converter -> mixed-signal IC -> semiconductor. Pipelined ADCs like the HI5746KCB trade slightly higher latency for high throughput and small die area, making them ideal for digitizing wideband IF, video, and instrumentation signals in the 1-100 MHz range.
Key features of the HI5746KCB include a single differential or single-ended analog input, a 10-bit parallel CMOS output bus with a 7-clock-cycle latency, excellent dynamic performance, and pin-for-pin functional compatibility with the legacy HI5702 and HI5703 10-bit ADCs. The CMOS outputs simplify interfacing with modern FPGAs, DSPs, and microcontrollers without level shifting, and the 28-pin SOIC footprint supports standard surface-mount assembly.
Typical applications include digital video, IF signal digitizing in communications receivers, medical imaging front-ends, CCD/cis sensor digitizers, and high-speed data acquisition cards. The part is rated for the commercial temperature range and is widely second-sourced and stocked through authorized distributors, supporting both new designs and legacy replacements.
When designing with the HI5746KCB, ensure the analog input is driven from a low-impedance, bandwidth-matched source (typically an op-amp or transformer) to preserve the converter's dynamic range. A clean low-noise analog supply is critical because the part's PSRR is finite at high frequencies; decouple AVDD and DVDD separately to avoid digital switching noise coupling into the analog input.
This page synthesizes distributor pricing, drop-in same-package alternatives (HI5746KCB-T, HI5746KCBZ, HI5746KCB-T), and practical design notes not found in the manufacturer datasheet alone.
Drop-in alternatives for HI5746KCB — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with HI5746KCB (same form factor and footprint) — differing in Input Type, Package, Architecture, RoHS Status, Resolution.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
HI5746KCB-T
✅ Drop-In✓ In Stock
$5.1 / Unit
View Datasheet →HI5746KCBZ
✅ Drop-In✓ In Stock
$6.8 / Unit
View Datasheet →HI5703KCB
✅ Drop-In📋 Reference alternative (not in catalog)
AD976ANZ
✅ Drop-In✓ In Stock
$22.1 / Unit
View Datasheet →ADS901E/1K
✅ Drop-In✓ In Stock
$2.59 / Unit
View Datasheet →HI5746KCB Maximum Ratings & Electrical Characteristics
| Resolution | 10 bit |
| Number of Channels | 1 |
| Sampling Rate | 40 MSPS |
| Architecture | Pipelined CMOS ADC |
| Input Type | Differential, Single-Ended |
| Data Interface | Parallel CMOS (10-bit word) |
| Output Format | Parallel, Word Access |
| Package | 28-SOIC (Wide, 7.50 mm) |
| Pin Count | 28 |
| Mounting Type | Surface Mount |
| Power Consumption | 225 mW at 40 MSPS |
| Latency | 7 clock cycles |
| Process Technology | CMOS |
| Conversion Method | Flash/Pipelined hybrid |
HI5746KCB Pin Configuration
| Pin 1 | DVDD — Digital supply |
| Pin 2 | DGND — Digital ground |
| Pin 3 | D0 — Data output bit 0 (LSB) |
| Pin 4 | D1 — Data output bit 1 |
| Pin 5 | D2 — Data output bit 2 |
| Pin 6 | D3 — Data output bit 3 |
| Pin 7 | D4 — Data output bit 4 |
| Pin 8 | D5 — Data output bit 5 |
| Pin 9 | D6 — Data output bit 6 |
| Pin 10 | D7 — Data output bit 7 |
| Pin 11 | D8 — Data output bit 8 |
| Pin 12 | D9 — Data output bit 9 (MSB) |
| Pin 13 | CLK — Sample clock input |
| Pin 14 | DGND — Digital ground |
| Pin 15 | DVDD — Digital supply |
| Pin 16 | AGND — Analog ground |
| Pin 17 | AVDD — Analog supply |
| Pin 18 | VREF — Voltage reference |
| Pin 19 | IN+ — Analog differential input (positive) |
| Pin 20 | IN- — Analog differential input (negative) |
| Pin 21 | AGND — Analog ground |
| Pin 22 | AVDD — Analog supply |
| Pin 23 | NC — Not connected (per datasheet) |
| Pin 24 | NC — Not connected (per datasheet) |
| Pin 25 | NC — Not connected (per datasheet) |
| Pin 26 | NC — Not connected (per datasheet) |
| Pin 27 | NC — Not connected (per datasheet) |
| Pin 28 | NC — Not connected (per datasheet) |
Typical Applications
HI5746KCB is suitable for 6 applications: Digital Video Digitizer, IF Signal Digitizing in Communications Receivers, Medical Imaging Front-End, CCD/CIS Sensor Digitizer, High-Speed Data Acquisition Card, Set-Top Box and Consumer Video Processing.
Digital Video Digitizer
The HI5746KCB's 40 MSPS sample rate and 10-bit resolution are well-matched to digitizing standard-definition and component video signals up to the Nyquist limit of 20 MHz. The CMOS parallel output bus simplifies interfacing to FPGA video pipelines, while the 225 mW power budget keeps thermal dissipation manageable in dense multi-channel video capture cards. The pipelined 7-clock latency is deterministic, which simplifies timing alignment across multi-channel video synchronization.
Recommended
IF Signal Digitizing in Communications Receivers
The HI5746KCB's 40 MSPS capability and wide analog input bandwidth make it suitable for digitizing wideband IF signals in communications receivers and software-defined radio front-ends. The differential analog input rejects common-mode noise from upstream mixers, while the CMOS outputs interface directly to FPGAs running DDC and demodulation firmware. At 225 mW, the converter fits comfortably in fan-cooled base-station chassis.
Recommended
Medical Imaging Front-End
The HI5746KCB is used in ultrasound and medical imaging front-ends to digitize time-gated analog return signals with 10-bit precision at 40 MSPS. The pipelined architecture provides deterministic latency, essential for beamforming across multiple synchronized ADC channels. CMOS outputs simplify routing to FPGA-based image reconstruction pipelines, while 225 mW keeps per-channel power budgets within thermal limits.
Recommended
CCD/CIS Sensor Digitizer
The HI5746KCB digitizes analog outputs from charge-coupled device (CCD) and CMOS image sensor (CIS) arrays in industrial cameras and document scanners. The 40 MSPS throughput supports multi-megapixel sensors with line rates in the hundreds of kHz range, while the 10-bit dynamic range is adequate for general-purpose machine vision. Single-ended input mode allows direct coupling to sensor output buffers.
Recommended
High-Speed Data Acquisition Card
The HI5746KCB is a workhorse for PCI/USB modular data acquisition cards used in test & measurement and industrial monitoring. The 40 MSPS sample rate supports digitizing transient signals, vibration, and control-loop feedback. The 28-SOIC package is easy to hand-solder during prototyping and is supported by standard 4-layer PCB stack-ups. Parallel CMOS outputs enable direct connection to FPGA buffers.
Recommended
Set-Top Box and Consumer Video Processing
The HI5746KCB's combination of 40 MSPS, 10-bit resolution, and low 225 mW power makes it well-suited for set-top box video decoding pipelines and consumer video peripherals. CMOS outputs eliminate the need for level translation to ASIC/FPGA video processors, while the 28-SOIC footprint is compatible with high-volume SMT assembly. The part's mature status and wide stocking make it a low-risk BOM choice.
Recommended
Recommended Products Summary
Engineering reference data for HI5746KCB — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | HI5746KCB-T | HI5746KCBZ | HI5703KCB | AD976ANZ | ADS901E/1K |
|---|---|---|---|---|---|---|
| Package | 28-SOIC (Wide) | 28-SOIC (Wide) - same | 28-SOIC (Wide) - same | 28-SOIC (Wide) - same | 28-SOIC - same | 28-SOIC - same |
| Brand | Renesas Electronics (formerly Intersil) | Renesas Electronics | Renesas Electronics | Renesas Electronics | Analog Devices | Texas Instruments |
| Resolution | 10 bit | 10 bit | 10 bit | 10 bit | 10 bit | 10 bit |
| Pin-Compatibility Verified | Reference part | Yes (same die) | Yes (same die) | Per datasheet (pin-for-pin) | Same package, different pinout (verify) | Same package, different pinout (verify) |
Key Differentiators
- Pin-for-pin compatible with legacy HI5702/HI5703 (vs HI5702/HI5703 legacy 10-bit ADCs)
- Mature, widely-stocked 10-bit 40 MSPS ADC (vs AD976ANZ (Analog Devices, 10-bit but DAC not ADC))
- Lowest-power 40 MSPS 10-bit ADC in 28-SOIC (vs ADS901E/1K (TI, 10-bit 28-SOIC ADC family))
Design Notes
Drive the analog IN+/IN- inputs from a low-impedance, bandwidth-matched source (op-amp driver such as ADA4898 or a wideband transformer) to preserve the converter's dynamic range. The differential input rejects common-mode noise from upstream mixers, but only if the source maintains tight balance. Place the input coupling network as close to the ADC pins as possible to minimize parasitic capacitance that could degrade bandwidth above 20 MHz.
Use separate analog (AVDD) and digital (DVDD) supply planes joined at a single point near the ADC. The HI5746KCB's finite PSRR at high frequencies means digital switching noise can couple into the analog input if supplies are shared. Decouple each AVDD pin with a 10 uF tantalum plus 100 nF ceramic locally; place the 100 nF cap within 5 mm of the pin to minimize parasitic inductance.
Route the CMOS output bus D0-D9 with matched trace lengths and a 50 ohm characteristic impedance if traces exceed 25 mm. Keep digital output traces away from the analog IN+/IN- traces and the AVDD plane to avoid digital noise coupling. Use a solid ground plane under the SOIC footprint; avoid signal routing on layers directly beneath the analog input pins.
Do not exceed the absolute maximum analog input voltage; the IN+/IN- pins are ESD-sensitive and should be protected with clamping diodes or a front-end attenuator network when interfacing to high-voltage transducers. Ensure the CLK signal is clean with sharp edges (less than 2 ns rise/fall); a slow clock degrades aperture jitter and effective SNR. Reference the internal voltage reference through the VREF pin only after the analog supply has stabilized, or the first conversions may be inaccurate.
Compliance Information
RoHS status not confirmed in retrieved data; HI5746KCBZ variant likely RoHS-compliant based on Z suffix convention - verify via Renesas product page before use in RoHS-required designs.
