MC9328MX1VM20 - i.MX1 ARM920T 200MHz MPU, 225-MAPBGA | NXP
MPN: MC9328MX1VM20 ✗ End of Life| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $14.75 | $14.75 |
| 10 | $13.2 | $132.00 |
| 100 | $11.55 | $1,155.00 |
| 500 | $10.12 | $5,060.00 |
| 1,000 | $8.9 | $8,900.00 |
MC9328MX1VM20 Overview
An ARM920T microprocessor is a 32-bit RISC processor core that combines the ARM9TDMI integer core with separate instruction and data caches plus a memory management unit, and it represents an early generation of system-on-chip applications processors for portable and embedded devices. Positioned in the broader i.MX family hierarchy (i.MX1 -> i.MX applications processors -> ARM9-class MPUs -> embedded microprocessors), the MC9328MX1 enabled early PDAs, smart-handheld terminals, industrial HMI panels, and web-pad products in the early 2000s.
Key features include 200 MHz ARM920T core, on-chip 16 KB/16 KB I/D caches, integrated LCD controller up to VGA resolution, USB 1.1 full-speed/device on-chip transceiver, PCMCIA/PC Card support, SSI/I2S interface, and an external memory interface that supports SDRAM, SRAM, NOR and NAND flash in a 13x13 mm MAPBGA. The device targets portable, low-power embedded designs and is paired with external SDRAM and boot flash in typical reference designs.
From an architecture standpoint, the ARM920T uses a Harvard arrangement with separate 16 KB instruction and 16 KB data caches backed by a write buffer, and the i.MX1 wraps that core with the system-bus fabric, SDRAM controller, peripheral bridges, and timing-specific I/O pads necessary for handheld products. The 'M20' speed grade denotes the 200 MHz operation point over a 1.65-1.95 V core range.
Typical applications include PDA-style handheld terminals, industrial HMI panels, web pads, point-of-sale terminals, and portable medical instruments. The integrated LCD and USB peripherals make it well matched to products that need a display, mass storage, and a keyboard/touch interface without an external bridge IC.
When designing with this device, observe the recommended SDRAM trace-length matching, place the bypass capacitors as close as possible to each power pin pair, and use the boot-mode strapping resistors to select the desired boot source. The device is no longer recommended for new designs (NRND/EOL), so long-life or new-product designs should review newer i.MX parts.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone, including parametric snapshots and selection guidance engineers need when extending the lifecycle of legacy i.MX1 designs.
Drop-in alternatives for MC9328MX1VM20 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with MC9328MX1VM20 (same form factor and footprint) — differing in Core Architecture, RoHS Status, External Memory Support, Package.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
MC9328MX1VM10
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
MC9328MX1CVM10
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
MC9328MX1DVM20
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$16.2 / Unit
View Datasheet →MC9328MX1VM20R2
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
MC9328MX1VM20 Maximum Ratings & Electrical Characteristics
| Core Architecture | ARM920T |
| Core Count | 1 |
| Data Bus Width | 32-bit |
| Maximum CPU Clock | 200 MHz |
| Supply Voltage (Core) | 1.65 V to 1.95 V (M20 speed grade) |
| Package | 225-MAPBGA (13x13 mm, 256 balls) |
| Mounting Type | Surface Mount |
| Instruction Cache | 16 KB |
| Data Cache | 16 KB |
| MMU | Yes |
| LCD Controller | Integrated (up to VGA-class) |
| USB | USB 1.1 full-speed/device with on-chip transceiver |
| PCMCIA / PC Card | Supported |
| Audio Interface | SSI / I2S |
| External Memory Support | SDRAM, SRAM, NOR flash, NAND flash |
| RoHS Status | Compliant (per NXP product page) |
MC9328MX1VM20 225-mapbga (13x13 mm, 256 balls) Pin Configuration Guide
Pin configuration for MC9328MX1VM20 (225-mapbga (13x13 mm, 256 balls) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for MC9328MX1VM20.
Refer to the datasheet for full pin configuration.
Typical Applications
MC9328MX1VM20 is suitable for 6 applications: PDA / Smart Handheld Terminal, Industrial HMI Panel, Web Pad / Information Appliance, Point-of-Sale Terminal, Portable Medical Instrument, Industrial Data-Logger / Gateway.
PDA / Smart Handheld Terminal
The MC9328MX1VM20's ARM920T core at 200 MHz, integrated LCD controller, USB 1.1 device port, and PCMCIA support make it well matched to PDA and smart-handheld terminals of the early i.MX1 generation. With 16/16 KB caches and a full MMU it runs PocketPC/CE/embedded Linux BSPs validated for this family, while the on-chip peripheral set lets engineers eliminate multiple bridge ICs and fit the design into a pocketable form factor. Typical schematics pair the BGA with a single SDRAM, a NAND boot flash, and a QVGA panel. Designers should follow the i.MX1 reference design for SDRAM trace matching and boot-mode strapping. As of 2026-10-16, this remains a viable drop-in for legacy handheld retrofits.
Recommended
Industrial HMI Panel
Industrial HMI panels benefit from the i.MX1's VGA-capable LCD controller, PC Card interface for add-on modules, SSI/I2S for audio feedback, and the integration of USB and serial peripherals on a single 225-MAPBGA. The 200 MHz ARM920T runs WinCE / embedded Linux BSPs used by many legacy HMI vendors, eliminating the need for an external graphics chip. In typical implementations, the BGA sits next to a 64 MB SDRAM, a 32 MB NOR, and a resistive touch controller. Designers should observe the recommended decoupling layout per the i.MX1 datasheet and use proper boot-mode strapping for fail-safe recovery. Stock up to 2026-10-16 supports long-term spare-part support through Rochester Electronics.
Recommended
Web Pad / Information Appliance
The web-pad and information-appliance category was the i.MX1's launch market, leveraging the ARM920T's browsing capability, integrated LCD up to VGA, USB for keyboard/mouse, and PCMCIA for wireless cards. The 225-MAPBGA keeps the footprint compact for thin display-housing designs, while SDRAM/NAND boot paths validated by the BSP shorten development time. Designers typically add an external Ethernet or Wi-Fi PC Card and route the integrated LCD bus directly to the panel. The MAPBGA footprint is documented in the i.MX1 datasheet and supports standard PCB stack-ups for portable enclosures. This remains a faithful retrofit for legacy web-pad designs still in service as of 2026-10-16.
Recommended
Point-of-Sale Terminal
POS terminals benefit from the i.MX1's PCMCIA slot for legacy card readers, USB device port for tethered scanners, SSI/I2S for audio prompts, and the ARM920T's ability to run embedded Linux with strong peripheral drivers. The 1.8 V core and integrated USB transceiver reduce BOM count compared to earlier MPU designs. In a typical POS reference design the BGA sits with 64 MB SDRAM, 16 MB NOR, and an external PCMCIA-to-CompactFlash bridge. Designers should follow JEDEC J-STD-033 handling for the MAPBGA and observe the i.MX1 reference layout for SDRAM and PCMCIA signal integrity.
Recommended
Portable Medical Instrument
Portable medical instruments used the i.MX1 for its integrated USB, compact 225-MAPBGA, low-power 1.8 V core, and validated WinCE/Linux BSPs that supported medical peripherals such as touchscreens and barcode scanners. The integrated LCD controller drives the clinician display directly, while the PCMCIA controller accepts memory-card-based patient logs. Typical designs add a touch controller, audio codec on SSI/I2S, and a rechargeable battery subsystem. The MAPBGA footprint is documented in the i.MX1 datasheet and is suitable for handheld enclosures. For medical programs still in production, the legacy supply chain remains stable through 2026-10-16 via NXP and Rochester Electronics.
Recommended
Industrial Data-Logger / Gateway
The i.MX1's PCMCIA slot, USB, and Ethernet-over-PC-Card capability made it a useful platform for early industrial data-logger and protocol-gateway designs. The ARM920T at 200 MHz runs embedded Linux with strong driver support for industrial fieldbuses mapped through PC Card, while the 225-MAPBGA keeps the gateway footprint compact inside DIN-rail enclosures. Standard SDRAM and NAND boot designs validated in the i.MX1 reference schematics accelerate certification cycles. Engineers should observe the i.MX1 datasheet timing margins for PCMCIA cycles and adopt proper RS-232/485 transceivers on the serial UART. As of 2026-10-16 the part is still orderable for legacy retrofit.
Recommended
Recommended Products Summary
Engineering reference data for MC9328MX1VM20 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | MC9328MX1VM10 | MC9328MX1CVM10 | MC9328MX1DVM20 |
|---|---|---|---|---|
| Brand | NXP Semiconductors (Freescale legacy) | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | 225-MAPBGA (13x13 mm) | 225-MAPBGA (13x13 mm) - same | 225-MAPBGA (13x13 mm) - same | 225-MAPBGA (13x13 mm) - same |
| Core | ARM920T | ARM920T | ARM920T | ARM920T |
| Maximum Clock | 200 MHz | 150 MHz (typical VM10 grade) | 150 MHz (typical VM10 grade) | 200 MHz (alternate VM20 grade) |
| Core Voltage | 1.65 V to 1.95 V | 1.65 V to 1.95 V (typical) | 1.65 V to 1.95 V (typical) | 1.65 V to 1.95 V |
| I Cache / D Cache | 16 KB / 16 KB | 16 KB / 16 KB | 16 KB / 16 KB | 16 KB / 16 KB |
| LCD Controller | Yes (VGA-class) | Yes | Yes | Yes |
| USB | USB 1.1 FS device | USB 1.1 FS device | USB 1.1 FS device | USB 1.1 FS device |
| Lifecycle Status | NRND / EOL | NRND / EOL | NRND / EOL | NRND / EOL |
Key Differentiators
- Higher speed grade within the same 225-MAPBGA footprint (vs MC9328MX1VM10)
- Standard commercial vs industrial temperature variant in the same BGA (vs MC9328MX1CVM10)
- Alternate VM20 speed-grade sibling (vs MC9328MX1DVM20)
Design Notes
The 225-MAPBGA uses a fine pitch that demands a controlled-impedance PCB stack-up with matched-length SDRAM traces; follow the i.MX1 reference design's trace-length matching rules for the address/command bus. Place the bulk decoupling capacitors (typically 10 uF) adjacent to each power pin pair, and place the high-frequency 0.1 uF bypass as close to the balls as the PCB escape routing allows. Microstrip-vs-stripline selection should match the stack-up used during i.MX1 silicon validation.
Boot-mode strapping on the i.MX1 selects between NOR boot, NAND boot, and serial downloader; pull-up/pull-down values are documented in the i.MX1 datasheet and must be wired to the correct balls or the system will appear dead at power-up. Estimated: an incorrect strap that swaps the boot source is the single most common factory-rework root cause on i.MX1 boards. Always check the strapping before bringing up SDRAM initialization. The 1.8 V core supply must be sequenced correctly with respect to the I/O supply per the datasheet.
Estimated: at 200 MHz and 1.8 V core with typical 1.5 mW/MHz core scaling, the ARM920T and on-chip peripherals dissipate roughly 300-400 mW under full LCD/USB activity. The 225-MAPBGA's theta_JA is roughly 30 C/W on a 4-layer JEDEC test board, giving a junction-to-ambient rise of about 10-15 C/W under typical workload. Handheld enclosures with limited airflow should add a thermal via array under the center balls of the MAPBGA. Industrial gateways without forced cooling should review duty cycle or migrate to a lower-frequency VM10 speed grade.
The PCMCIA/PC Card bus on the i.MX1 has bus cycle timing margins that are sensitive to trace impedance; series termination on PCMCIA signal lines (typically 33 ohm) reduces over/undershoot on long card-cage cables. The SDRAM clock and DQS signals must be length-matched within +/- 25 mils to maintain read/write margins at 100 MHz SDRAM operation. The USB device-port DP/DM traces must be 90 ohm differential and routed without stubs; the i.MX1 reference design shows the recommended short, symmetrical escape.
Use a 4- or 6-layer PCB stack-up with continuous reference planes under the MAPBGA. Keep the analog and digital grounds referenced to the same 0 V plane, with a single-point bridge under the device if the design splits ground. Place the boot flash as close as practical to allow short, length-matched traces. Use JEDEC J-STD-033 dry-pack handling because the MAPBGA package is moisture-sensitive (the exact MSL rating is not stated in the verified web data and is marked [DATA_NEEDED]).
Compliance Information
RoHS compliance per NXP product page. Reach status not explicitly stated in the verified web data - set to unknown. Not AEC-Q100 qualified (industrial-comms and consumer focus, not automotive).
