MCIMX357DVM5B - i.MX35 532MHz ARM1136 MPU 400-LFBGA | NXP
MPN: MCIMX357DVM5B ⚠ Last Time Buy| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $28.46 | $28.46 |
| 10 | $26.1 | $261.00 |
| 100 | $22.85 | $2,285.00 |
| 500 | $19.95 | $9,975.00 |
| 1,000 | $17.5 | $17,500.00 |
MCIMX357DVM5B Overview
A microprocessor (MPU) is an integrated circuit that integrates a central processing unit, memory controllers, and a rich set of on-chip peripherals into a single device, enabling compact, power-efficient system designs. The i.MX35 family sits within the NXP i.MX multimedia applications processor portfolio, targeting industrial HMI, automotive infotainment, and portable consumer products. Within the broader taxonomy, the MCIMX357DVM5B belongs to the hierarchy: ARM1136JF-S core -> ARM11 family -> ARM architecture -> microprocessor -> integrated circuit -> electronic component.
Key features include a 10/100 Ethernet MAC for wired connectivity, two FlexCAN modules for automotive/industrial networking, HS USB OTG + PHY and HS USB Host, an LCD controller for direct panel drive, an Image Processing Unit (IPU) for camera and display pipelines, and ROMless boot from external NOR/NAND flash. The integrated peripherals reduce BOM count and PCB complexity for cost-sensitive embedded designs.
The MCIMX357DVM5B is built on a 90 nm CMOS process and supports an industrial temperature range. Its combination of deterministic real-time response (via the ARM1136JF-S core with Jazelle Java acceleration) and multimedia acceleration (OpenVG 1.1 + IPU) makes it suitable for graphical human-machine interfaces and connected embedded nodes.
Typical applications include industrial human-machine interfaces (HMI), point-of-sale terminals, automotive infotainment head units, portable medical devices, and connected IoT gateways. The 10/100 Ethernet MAC plus two FlexCAN interfaces make it a natural fit for industrial and automotive network endpoints.
When designing with this device, pay close attention to PCB layout for the 0.8 mm pitch BGA and provide adequate power-rail decoupling. The ROMless boot mode requires an external boot ROM or NOR flash to initialize the system before any application code can execute.
This page synthesizes distributor pricing, drop-in i.MX35 alternatives, and practical design notes not aggregated on a single manufacturer or distributor page, supporting fast procurement decisions for long-life industrial designs.
Drop-in alternatives for MCIMX357DVM5B — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with MCIMX357DVM5B (same form factor and footprint) — differing in Core Architecture, Package, Manufacturer, Graphics Accelerator, Program Memory Type.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
MCIMX353DVM5B
✅ Drop-In✓ In Stock
$15.2 / Unit
View Datasheet →MCIMX357DJQ5C
✅ Drop-In✓ In Stock
$23.4 / Unit
View Datasheet →MCIMX357CVM5B
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$21.5 / Unit
View Datasheet →MCIMX357DVM5B Maximum Ratings & Electrical Characteristics
| Core Architecture | ARM1136JF-S |
| Maximum CPU Clock | 532 MHz |
| Core Count | 1 |
| Data Bus Width | 32-bit |
| On-chip SRAM | 128 KB |
| L1 Cache (I/D) | 16 KB |
| L2 Cache | 128 KB |
| Program Memory Type | ROMless |
| Number of I/O | 96 |
| Package / Case | 400-LFBGA (17x17 mm, 0.8 mm pitch) |
| Graphics Accelerator | OpenVG 1.1 2.5D hardware accelerator |
| Image Processing Unit | Yes (IPU) |
| LCD Controller | Yes (integrated) |
| Ethernet MAC | 10/100 Ethernet MAC |
| CAN Interfaces | 2 x FlexCAN |
| USB | HS OTG + PHY, HS Host |
| Oscillator Type | External |
| Mounting Type | Surface Mount |
| Packaging | Tray |
MCIMX357DVM5B 400-lfbga (17x17 mm, 0.8 mm pitch) Pin Configuration Guide
Pin configuration for MCIMX357DVM5B (400-lfbga (17x17 mm, 0.8 mm pitch) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for MCIMX357DVM5B.
Refer to the datasheet for full pin configuration.
Typical Applications
MCIMX357DVM5B is suitable for 6 applications: Industrial Human-Machine Interface (HMI), Automotive Infotainment Head Unit, Point-of-Sale (POS) Terminal, Portable Medical Device, Connected IoT Gateway, Industrial Printer / Label Maker.
Industrial Human-Machine Interface (HMI)
The MCIMX357DVM5B is well suited for industrial HMI panels where the 532 MHz ARM1136JF-S core drives OpenVG 1.1 2.5D graphics for smooth menu transitions and gauge rendering. The integrated LCD controller connects directly to TFT panels from 320x240 up to 1024x768 without an external bridge chip. Its 96 GPIOs and 10/100 Ethernet MAC simplify connection to industrial sensors, PLCs, and SCADA backbones, while the industrial temperature range and 400-LFBGA package support long-life factory-floor designs.
Recommended
Automotive Infotainment Head Unit
The MCIMX357DVM5B's dual FlexCAN interfaces connect directly to automotive body and powertrain CAN buses, while the IPU handles camera input for driver-facing or surround-view applications. The 532 MHz ARM1136JF-S core delivers enough performance for infotainment graphics and audio decoding, and the 128 KB L2 cache keeps UI latency low under multitasking. Designers pairing this MPU with an external audio codec and power amplifier can build a complete head unit on a compact PCB.
Recommended
Point-of-Sale (POS) Terminal
The MCIMX357DVM5B fits POS terminals because the ARM1136JF-S core runs a secure Linux or WinCE stack with plenty of headroom for payment applications, while HS USB OTG supports peripherals such as barcode scanners, receipt printers, and PIN pads. The 10/100 Ethernet MAC and two USB hosts deliver reliable connectivity for backend synchronization, and the OpenVG accelerator renders crisp product graphics and signature-capture UIs on the LCD panel.
Recommended
Portable Medical Device
The MCIMX357DVM5B suits portable medical devices such as patient monitors and infusion pumps because the integrated IPU accelerates display rendering of vital-sign waveforms without taxing the CPU. The 128 KB on-chip SRAM provides deterministic response for interrupt-driven safety routines, and the 10/100 Ethernet MAC enables secure hospital-network connectivity. The industrial temperature range supports continuous operation in clinical environments.
Recommended
Connected IoT Gateway
The MCIMX357DVM5B is a strong fit for industrial IoT gateways that aggregate sensor data over two CAN buses and forward it via Ethernet or HS USB to a cloud backend. The ARM1136JF-S core at 532 MHz runs a Linux stack with TLS, MQTT, and OPC-UA stacks concurrently. The 128 KB L2 cache handles protocol buffering, and the ROMless boot from NAND or SD simplifies field firmware updates through the same USB OTG port used for maintenance.
Recommended
Industrial Printer / Label Maker
The MCIMX357DVM5B drives industrial label printers and small-format printers where the 532 MHz ARM1136JF-S core renders fonts and barcodes quickly while the LCD controller interfaces with the operator panel. HS USB Host and 10/100 Ethernet MAC provide flexible connectivity for print-job submission, and the two FlexCAN ports support integration into CAN-based production lines. The 96 GPIOs handle print-head stepper control, paper sensors, and cutter actuators without extra logic.
Recommended
Recommended Products Summary
Engineering reference data for MCIMX357DVM5B — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | MCIMX353DVM5B | MCIMX357DJQ5C | MCIMX357CVM5B |
|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | 400-LFBGA (17x17 mm, 0.8 mm pitch) | 400-LFBGA (17x17) - same | 400-LFBGA (17x17) - same | 400-LFBGA (17x17) - same |
| Core Architecture | ARM1136JF-S | ARM1136JF-S | ARM1136JF-S | ARM1136JF-S |
| Maximum CPU Clock | 532 MHz | 400 MHz (-25%) | 532 MHz (same) | 532 MHz (same) |
| On-chip SRAM | 128 KB | 128 KB | 128 KB | 128 KB |
| L1 Cache (I/D) | 16 KB | 16 KB | 16 KB | 16 KB |
| L2 Cache | 128 KB | 128 KB | 128 KB | 128 KB |
| Ethernet MAC | 10/100 Ethernet MAC | 10/100 Ethernet MAC | 10/100 Ethernet MAC | 10/100 Ethernet MAC |
| CAN Interfaces | 2 x FlexCAN | 2 x FlexCAN | 2 x FlexCAN | 2 x FlexCAN |
| Program Memory Type | ROMless | ROMless | ROMless | ROMless |
Key Differentiators
- Highest-clocked i.MX35 in the 400-LFBGA lineup (vs MCIMX353DVM5B)
- Integrated OpenVG 1.1 2.5D hardware accelerator (vs MCIMX353DVM5B)
- Same LFBGA footprint as the rest of the i.MX35 family (vs MCIMX357DJQ5C)
Design Notes
The 400-LFBGA package uses a 0.8 mm ball pitch on a 17x17 mm body. Per NXP i.MX35 hardware design guidelines, use a microvia-in-pad PCB stack-up (8-layer minimum recommended) and matched-length DDR routing for the external memory bus. Place at least eight 0.1 uF decoupling capacitors within 5 mm of the BGA, with bulk 10 uF to 22 uF tantalum or polymer capacitors on each power rail. The center balls of the LFBGA provide thermal conduction; stitch thermal vias under the package to an inner ground plane to dissipate the 1 W to 2 W typical dissipation at 532 MHz.
The i.MX35 requires multiple supply rails (core, PLL, I/O, DDR, USB PHY) each with strict sequencing. Use the NXP-recommended PMIC such as the PF0100 or a discrete LDO + buck architecture. Estimated: at 532 MHz with 1.0 V core, the MPU draws approximately 600 mA to 800 mA; budget 1 A on the core LDO with adequate thermal relief. Failing to sequence rails correctly can latch-up or damage the part on power-up.
Do not assume the boot ROM stub will find your application image: configure the boot-mode pins (BMOD[1:0]) correctly for the chosen interface (NOR, NAND, SD, SPI). The MCIMX357DVM5B is ROMless, so an external boot device is mandatory. Also, the 96 GPIO count is the maximum theoretical number; actual usable GPIO depends on which peripherals you enable in the IOMUXC, so plan pin multiplexing early in the schematic phase to avoid last-minute rework.
Compliance Information
RoHS and lead-free per NXP product page. The standard MCIMX357DVM5B is not AEC-Q100 qualified; check the Q-suffix member of the family for AEC-Q100 qualification.
