MCZ33905S5EK - 5V SBC HS-CAN Single LIN | NXP
MPN: MCZ33905S5EK ✗ End of Life| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $6.5 | $6.50 |
| 10 | $5.85 | $58.50 |
| 100 | $5.1 | $510.00 |
| 500 | $4.5 | $2,250.00 |
| 1,000 | $3.95 | $3,950.00 |
MCZ33905S5EK Overview
A System Basis Chip (SBC) is an automotive-grade mixed-signal IC that consolidates a CAN/LIN physical layer, one or more voltage regulators (typically a 5 V LDO for the MCU), and supervision functions (watchdog, reset, wake-up) into a single package. The SBC sits between the vehicle's 12 V battery / bus and the microcontroller, reducing PCB area, BOM count, and quiescent current versus discrete implementations. SBCs are core building blocks in modern body-electronics modules and are commonly paired with 32-bit automotive MCUs such as the S32K1 and MPC56 families.
Key features include integrated HS-CAN transceiver with slopes control and bus diagnostics, a LIN 2.1 compliant interface with LIN output pin switch, two or three configurable wake-up pins that double as output drivers, low-power standby and sleep modes with wake-up capability via CAN, LIN, or the wake pins, and an SPI interface for MCU configuration and diagnostics. Voltage regulators include a 5 V LDO for the MCU with current limiting and thermal shutdown, plus a tracking/protection scheme for external sensors.
Architecturally, the MCZ33905S5EK combines a switched-mode or linear pre-regulator with a low-dropout 5 V regulator, an ISO 11898 compliant CAN physical layer, and a LIN 2.1 transceiver on a single die. The IC implements local and bus failure diagnostics, dominant-bus timeout, thermal protection on each regulator, and SPI-readable fault flags for ECU-level diagnostics. It is qualified to automotive grade 1 temperature (-40 C to +125 C) and supports passive and active bus fault management per ISO 11898-5.
Typical applications include automotive body control modules, gateway/ECU nodes, HVAC and lighting controllers, instrument clusters, and chassis/safety ECUs that require an HS-CAN interface together with a local 5 V supply and one LIN channel. The exposed pad on the SOIC-32 package also helps dissipate heat from the on-chip regulators in compact modules.
When designing with this device, verify the exact replacement designated in NXP's product-change notice (PCN) documentation. The MCZ33905 family has been declared end-of-life; engineers should confirm drop-in pin-compatible successors such as newer NXP SBC families or qualified second-source options before committing to new designs.
This page synthesizes NXP datasheet parameters, declared end-of-life status, distributor stock signals, and design considerations not always present in the original datasheet.
Drop-in alternatives for MCZ33905S5EK — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with MCZ33905S5EK (same form factor and footprint) — differing in CAN Interface, Function, Package, Product Type, Supply Voltage Range.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
MCZ33905DS5EKR2
✅ Drop-In📋 Reference alternative (not in catalog)
MCZ33905CS5EK
✅ Drop-In📋 Reference alternative (not in catalog)
MCZ33904S5EK
✅ Drop-In📋 Reference alternative (not in catalog)
MCZ33903S5EK
✅ Drop-In📋 Reference alternative (not in catalog)
MCZ33905S5EK Maximum Ratings & Electrical Characteristics
| Product Type | System Basis Chip (SBC) Gen 2 |
| Function | 5 V SBC with High-Speed CAN and single LIN interface |
| Supply Voltage Range | 5.5 V to 27 V |
| Regulated Output | 5 V LDO for MCU |
| CAN Interface | High-Speed CAN, ISO 11898-2 and ISO 11898-5 compliant |
| LIN Interface | Single LIN 2.1 channel |
| Wake-up Inputs | 2 to 3 configurable wake pins (also usable as outputs) |
| Control Interface | SPI for configuration and diagnostics |
| Package | 32-SOIC Exposed Pad (HSSOP, 7.50 mm width) |
| Mounting Type | Surface Mount |
| Operating Temperature | -40 C to +125 C (Automotive Grade 1) |
| Pin Count | 32 |
| Lifecycle Status | End of Life / Discontinued by NXP (PCN/Direct Discontinuance) |
| Family | MC33903 / MC33904 / MC33905 SBC Gen 2 |
MCZ33905S5EK Pin Configuration
| Pin 1 | VSUP — Battery supply input (5.5 V to 27 V) |
| Pin 2 | VCC — 5 V regulated output (MCU supply) |
| Pin 3 | GND — Ground |
| Pin 4 | CANH — CAN bus high line |
| Pin 5 | CANL — CAN bus low line |
| Pin 6 | SPLIT — CAN split termination output (per ISO 11898-5) |
| Pin 7 | LIN — LIN bus line |
| Pin 8 | WAKE1 / GPIO1 — Wake input or output driver |
| Pin 9 | WAKE2 / GPIO2 — Wake input or output driver |
| Pin 10 | WAKE3 / GPIO3 — Wake input or output driver |
| Pin 11 | SCLK — SPI clock |
| Pin 12 | MOSI — SPI master-out slave-in |
| Pin 13 | MISO — SPI master-in slave-out |
| Pin 14 | CS — SPI chip select (active low) |
| Pin 15 | RST — Reset output to MCU |
| Pin 16 | INT — Interrupt output to MCU |
| Pin 17 | TXD — CAN transmit data input |
| Pin 18 | RXD — CAN receive data output |
| Pin 19 | LINTXD — LIN transmit data input |
| Pin 20 | LINRXD — LIN receive data output |
| Pin 21 | EN — Enable / mode control |
| Pin 22 | VIO — Voltage reference / IO supply |
| Pin 23 | NC — Not connected (per datasheet) |
| Pin 24 | NC — Not connected (per datasheet) |
| Pin 25 | NC — Not connected (per datasheet) |
| Pin 26 | VBAT_SENSE — Battery voltage sense input |
| Pin 27 | TEMP — Temperature sense / monitor |
| Pin 28 | FAULT — Fault indicator output |
| Pin 29 | NC — Not connected (per datasheet) |
| Pin 30 | NC — Not connected (per datasheet) |
| Pin 31 | VCC_SENSE — 5 V regulator sense input |
| Pin 32 | EP — Exposed thermal pad - tie to GND |
Typical Applications
MCZ33905S5EK is suitable for 6 applications: Automotive Body Control Module (BCM), Automotive Gateway / ECU Node, HVAC Control Module, Instrument Cluster ECU, Lighting Control Module (Interior/Exterior), Chassis / Safety ECU (Sensor Nodes).
Automotive Body Control Module (BCM)
The MCZ33933902's wide 5.5 V-27 V supply tolerance and 5 V LDO let it sit directly on a 12 V body battery feed, supplying the host MCU rail while exposing a single LIN 2.1 channel and one HS-CAN network. Its 2-3 wake-up pins double as LED or relay drivers, simplifying BCM designs that need to wake on CAN, LIN, or a hard-wired switch. With AEC-Q100 grade 1 qualification (-40 C to +125 C) and an exposed pad for heatsinking, it tolerates under-hood thermal stress. Engineers should confirm the NXP PCN-recommended replacement before new BCM designs, as the part is end-of-life.
Recommended
Automotive Gateway / ECU Node
Acting as the physical-layer anchor of an automotive gateway, the MCZ33905S5EK provides the HS-CAN interface (ISO 11898-2/-5) plus a single LIN 2.1 channel, with SPI-based diagnostics readable by the host gateway MCU. Its integrated bus-failure diagnostics and fail-safe operating mode help the gateway log and isolate CAN bus faults - critical for functional-safety architectures. The 32-SOIC-EP exposed pad removes heat efficiently when the internal regulator delivers sustained current to the MCU and CAN stack. Use this SBC only with the NXP PCN-recommended successor for new gateway designs.
Recommended
HVAC Control Module
HVAC modules in body-electronics architectures typically need one HS-CAN connection to the vehicle network and one LIN bus to the blower or stepper-motor driver. The MCZ33905S5EK delivers exactly that combination while its 5 V LDO powers the HVAC MCU and the LIN master/slave interface. The exposed pad on the 32-SOIC-EP package manages thermal dissipation in dash-mounted modules where ambient temperature swings are wide. For new HVAC programs, check the NXP PCN for the recommended SBC successor.
Recommended
Instrument Cluster ECU
Instrument clusters require an HS-CAN link to the powertrain network plus a regulated 5 V rail for the cluster MCU and stepper-motor drivers for gauges. The MCZ33905S5EK combines both in a single exposed-pad SOIC-32, reducing PCB area behind the cluster bezel. Its configurable wake-up pins can be re-used as outputs to drive cluster backlighting or warning LEDs, simplifying the BOM. AEC-Q100 grade 1 thermal rating ensures operation in the high-ambient-temperature cluster environment. Plan around the EOL status by selecting the NXP PCN successor.
Recommended
Lighting Control Module (Interior/Exterior)
Exterior lighting modules (headlamp control units, tail-light drivers) need an HS-CAN link plus a regulated 5 V supply for the LED-driver MCU. The MCZ33905S5EK's exposed pad dissipates heat from the 5 V regulator efficiently, and its wake pins can be repurposed as low-side drivers for relay coils. For interior lighting LIN nodes, the LIN 2.1 channel can slave to a body-domain LIN master while CAN diagnostics report faults back to the BCM. Engineers should validate the PCN successor for new headlamp designs given the EOL status.
Recommended
Chassis / Safety ECU (Sensor Nodes)
Sensor-side ECUs in chassis systems (wheel-speed, steering-angle, ride-height) typically need one HS-CAN interface to the chassis network and a stable 5 V supply for the sensor front-end. The MCZ33905S5EK provides both with ISO 11898-5 bus-fault diagnostics, and its low-power standby/sleep modes reduce quiescent current on always-bus-powered modules. AEC-Q100 grade 1 operation supports under-body thermal environments. Use the NXP PCN-recommended replacement for new chassis sensor node designs.
Recommended
Recommended Products Summary
Engineering reference data for MCZ33905S5EK — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | MCZ33905DS5EKR2 | MCZ33905CS5EK | MCZ33904S5EK | MCZ33903S5EK |
|---|---|---|---|---|---|
| Package | 32-SOIC Exposed Pad (HSSOP) | 32-SOIC-EP (HSSOP) - same | 32-SOIC-EP (HSSOP) - same | 32-SOIC-EP (HSSOP) - same | 32-SOIC-EP (HSSOP) - same |
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Supply Voltage Range | 5.5 V to 27 V | 5.5 V to 27 V | 5.5 V to 27 V | 5.5 V to 27 V | 5.5 V to 27 V |
| 5 V MCU LDO | Yes | Yes | Yes | Yes | Yes |
| HS-CAN Channels | 1 | 1 | 1 | 1 | 1 |
| LIN Channels | 1 | 1 | 1 | 0 (no LIN) | 0 (no LIN) |
| Wake-up Pins | 2 to 3 | 2 to 3 | 2 to 3 | 2 to 3 | 2 to 3 |
| SPI Control Interface | Yes | Yes | Yes | Yes | Yes |
| Lifecycle Status | Obsolete / EOL | Obsolete / EOL | Obsolete / EOL | Obsolete / EOL | Obsolete / EOL |
Key Differentiators
- Highest LIN channel count in MC33903/4/5 family (vs MCZ33903S5EK / MCZ33904S5EK)
- Standard catalog tape-and-tube ordering code (vs MCZ33905CS5EK)
- Integrated HS-CAN + LIN + 5V LDO in single 32-SOIC-EP (vs Discrete CAN + LIN + LDO design)
Design Notes
The MCZ33905S5EK dissipates power primarily through the internal 5 V LDO when VIN is well above 5 V and the host MCU draws sustained current. The 32-SOIC-EP exposed pad is the primary thermal path and MUST be soldered to a copper pour (recommended at least 1 square inch of 2 oz copper) on the PCB. Estimated: at VIN=12 V, VOUT=5 V, IOUT=200 mA, dissipation is approximately 1.4 W; without proper PCB copper the junction would exceed the 150 C rating. Use multiple thermal vias under the EP for production designs.
Place the SBC as close as possible to the CAN bus connector and to the MCU to minimize stub lengths on the CANH/CANL differential pair. Keep the SPI bus (SCLK, MOSI, MISO, CS) short and routed away from the LIN and CAN traces to avoid coupling. Decouple VSUP and VCC with a 100 nF ceramic plus a bulk capacitor (>=10 uF) per the NXP datasheet reference layout. The exposed-pad copper pour should not be cut under high-speed signal traces.
Do not source the SBC 5 V output to external loads exceeding its current-limit rating, or to inductive loads without proper flyback protection. The wake-up pins can be configured as inputs OR outputs - mis-configuring direction in SPI can cause contention with external drivers. Because this part is end-of-life, never start a new design without confirming the NXP PCN-recommended replacement; obsolete stock carries counterfeit risk, so purchase only from franchised NXP distributors.
For sleep-current-sensitive applications, configure the SBC to its lowest-power sleep mode using SPI and route wake sources only through LIN, CAN, or the wake-up pins. Estimated: quiescent current in sleep is typically tens of microamperes per the SBC Gen 2 datasheet, but always verify on the bench as figures can vary with VIO loading. Add a reverse-battery protection diode (or P-MOSFET) on VSUP if your module lacks an upstream protection circuit.
Compliance Information
AEC-Q100 grade 1 per NXP datasheet. RoHS/REACH compliance not confirmed from public web data; consult NXP product page or PCN for definitive compliance attestation. Lifecycle is obsolete/EOL per the NXP product page.
